mirror of
https://github.com/YosysHQ/yosys
synced 2025-04-16 05:48:44 +00:00
8 lines
177 B
Plaintext
8 lines
177 B
Plaintext
read_verilog latches.v
|
|
synth_ecp5
|
|
cd top
|
|
select -assert-count 4 t:LUT4
|
|
select -assert-count 1 t:PFUMX
|
|
select -assert-none t:LUT4 t:PFUMX %% t:* %D
|
|
write_verilog latches_synth.v
|