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yosys/docs/source/using_yosys
Gary Wong 9f022f01da verilog: add support for SystemVerilog string literals.
Differences are new escape sequences (including escaped newline
continuations and hex escapes) and triple-quoted literals.
2025-08-08 15:36:43 +02:00
..
more_scripting Docs: Fix cmd links from bugpoint docs 2025-08-06 13:52:13 +12:00
synthesis Reapply "Add groups to command reference" 2025-08-06 13:52:12 +12:00
bugpoint.rst Docs: Fix cmd links from bugpoint docs 2025-08-06 13:52:13 +12:00
index.rst Docs: Move verilog.rst to using_yosys 2025-08-05 09:53:58 +12:00
verilog.rst verilog: add support for SystemVerilog string literals. 2025-08-08 15:36:43 +02:00