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yosys/tests
Zachary Snow 207af4196b fixup verilog doubleslash test
- add generated doubleslash.v to .gitignore
- ensure backend verilog can be read again
2022-01-03 08:17:46 -07:00
..
aiger switch argument order to work with macOS getopt 2020-09-23 12:48:26 +02:00
arch Fix the tests we just broke 2021-12-10 00:22:37 +01:00
asicworld
bind Add support for parsing the SystemVerilog 'bind' construct 2021-07-16 09:31:39 -04:00
blif tests/blif: Add missing gitignore 2021-05-20 12:49:51 +02:00
bram Fix the tests we just broke 2021-12-10 00:22:37 +01:00
errors
fsm
hana
liberty dfflibmap: Refactor to use dfflegalize internally. 2020-07-09 18:51:03 +02:00
lut
memfile
memories Fix the tests we just broke 2021-12-10 00:22:37 +01:00
opt memory_share: Fix SAT-based sharing for wide ports. 2021-12-20 18:40:14 +01:00
opt_share tests: Parallelize 2020-09-21 15:07:02 +02:00
proc proc_prune: Make assign removal and promotion per-bit, remember promoted bits. 2021-08-14 15:26:11 +02:00
realmath
rpc
sat assertpmux: Fix crash on unused $pmux output. 2021-02-22 23:30:28 +01:00
select
share
simple sv: fix size cast clipping expression width 2022-01-03 08:17:35 -07:00
simple_abc9 abc9: fix SCC issues (#2694) 2021-03-29 22:01:57 -07:00
smv
sva
svinterfaces Add a test for interfaces on modules loaded on-demand 2021-07-14 22:54:50 -04:00
svtypes sv: improve support for wire and var with user-defined types 2021-08-12 22:41:41 -06:00
techmap Fix the tests we just broke 2021-12-10 00:22:37 +01:00
tools Fixes in vcdcd.pl for newer Perl versions 2021-10-19 10:56:43 +02:00
unit
various Fix the tests we just broke 2021-12-10 00:22:37 +01:00
verilog fixup verilog doubleslash test 2022-01-03 08:17:46 -07:00
vloghtb Use HTTPS for website links, gatecat email 2021-06-09 12:16:56 +02:00
gen-tests-makefile.sh tests: Parallelize 2020-09-21 15:07:02 +02:00