Jannis Harder 79e05a195d verilog: Bufnorm cell backend and frontend support ... This makes the Verilog backend handle the $connect and $input_port cells. This represents the undirected $connect cell using the `tran` primitive, so we also extend the frontend to support this.		2025-09-17 14:01:09 +02:00
..
.gitignore
const2ast.cc	Remove .c_str() calls from parameters to log_file_warning()	2025-09-16 23:03:45 +00:00
Makefile.inc
preproc.cc
preproc.h
verilog_error.cc
verilog_error.h
verilog_frontend.cc	Remove .c_str() calls from parameters to log_header()	2025-09-16 23:00:42 +00:00
verilog_frontend.h
verilog_lexer.h
verilog_lexer.l	verilog: Bufnorm cell backend and frontend support	2025-09-17 14:01:09 +02:00
verilog_location.h
verilog_parser.y