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			30 lines
		
	
	
	
		
			522 B
		
	
	
	
		
			Text
		
	
	
	
	
	
			
		
		
	
	
			30 lines
		
	
	
	
		
			522 B
		
	
	
	
		
			Text
		
	
	
	
	
	
| logger -werror "out of bounds"
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| read_verilog <<EOT
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| module Example;
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| 
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|     parameter FLAG = 1;
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|     wire [3:0] inp;
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| 
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|     reg out1;
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|     initial out1 = FLAG ? &inp[2:0] : &inp[4:0];
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| 
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|     reg out2;
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|     initial
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|         if (FLAG)
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|             out2 = &inp[2:0];
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|         else
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|             out2 = &inp[4:0];
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| 
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|     wire out3;
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|     assign out3 = FLAG ? &inp[2:0] : &inp[4:0];
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| 
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|     wire out4;
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|     generate
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|         if (FLAG)
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|             assign out4 = &inp[2:0];
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|         else
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|             assign out4 = &inp[4:0];
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|     endgenerate
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| 
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| endmodule
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| EOT
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