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Code Activity
yosys/techlibs
History
Eddie Hung 1c9f3fadb9 Add Tsu offset to boxes, and comments
2019-07-11 17:17:26 -07:00
..
achronix Reduce amount of trailing whitespace in code base 2019-02-28 14:58:11 -08:00
anlogic Reduce amount of trailing whitespace in code base 2019-02-28 14:58:11 -08:00
common Make doc consistent 2019-06-14 10:32:46 -07:00
coolrunner2 Revert "synth_* with -retime option now calls abc with -D 1 as well" 2019-04-18 07:59:16 -07:00
easic Revert "synth_* with -retime option now calls abc with -D 1 as well" 2019-04-18 07:59:16 -07:00
ecp5 Error out if -abc9 and -retime specified 2019-07-10 12:47:48 -07:00
gowin Merge branch 'master' of https://github.com/dh73/yosys_gowin into dh73-master 2019-04-22 09:09:27 +02:00
greenpak4 techlibs/greenpak4/cells_map.v: Harmonize whitespace within lut module 2019-02-26 09:40:46 -08:00
ice40 Error out if -abc9 and -retime specified 2019-07-10 12:47:48 -07:00
intel synth_intel: Warn about untested Quartus backend 2019-07-07 19:26:31 +01:00
sf2 Add link to SF2 / igloo2 macro library guide 2019-03-07 09:08:26 -08:00
xilinx Add Tsu offset to boxes, and comments 2019-07-11 17:17:26 -07:00
.gitignore added .gitignore files 2013-01-05 11:19:11 +01:00