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Code
Activity
1ba09c4ab7
yosys
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passes
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Eddie Hung
7911143827
Create new $__XILINX_SHREG_ cell for variable length too
2019-08-23 18:15:49 -07:00
..
cmds
More use of IdString::in()
2019-08-15 09:23:57 -07:00
equiv
Spelling
2019-08-22 16:06:36 -07:00
fsm
RTLIL::S{0,1} -> State::S{0,1}
2019-08-07 11:12:38 -07:00
hierarchy
stoi -> atoi
2019-08-07 11:09:17 -07:00
memory
stoi -> atoi
2019-08-07 11:09:17 -07:00
opt
Copy-paste typo
2019-08-22 08:43:44 -07:00
pmgen
Create new $__XILINX_SHREG_ cell for variable length too
2019-08-23 18:15:49 -07:00
proc
proc_clean: fix order of switch insertion.
2019-08-19 16:44:23 +00:00
sat
In sat: 'x' in init attr should not override constant
2019-08-22 16:42:19 -07:00
techmap
Actually, there might not be any harm in updating sigmap...
2019-08-22 16:16:56 -07:00
tests
More use of IdString::in()
2019-08-15 09:23:57 -07:00