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f0a52e3dd2
In line with other tools, this adds an extra wrapping block around such for loops to appropriately scope the variable.
9 lines
241 B
Text
9 lines
241 B
Text
logger -expect error "For loop inline variable declaration is only supported in SystemVerilog mode!" 1
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read_verilog <<EOT
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module top;
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integer z;
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initial
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for (integer i = 1; i < 10; i = i + 1)
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z = i;
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endmodule
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EOT
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