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12 lines
163 B
Text
12 lines
163 B
Text
read_verilog << EOT
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module test (A, B, C, D, Y);
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input A, B, C, D;
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output Y;
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assign Y = A^B^C^D^A;
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endmodule
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EOT
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techmap
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equiv_opt -assert extract_reduce
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