Xiretza 17163cf43a Add flooring modulo operator ... The $div and $mod cells use truncating division semantics (rounding towards 0), as defined by e.g. Verilog. Another rounding mode, flooring (rounding towards negative infinity), can be used in e.g. VHDL. The new $modfloor cell provides this flooring modulo (also known as "remainder" in several languages, but this name is ambiguous). This commit also fixes the handling of $mod in opt_expr, which was previously optimized as if it was $modfloor.		2020-05-28 22:59:03 +02:00
..
flowmap	flowmap: implement depth relaxation.	2019-01-08 01:13:05 +00:00
Makefile.inc	Added "test_abcloop" command	2014-09-19 15:51:34 +02:00
test_abcloop.cc	kernel: big fat patch to use more ID::*, otherwise ID(*)	2020-04-02 09:51:32 -07:00
test_autotb.cc	Add plusargs for output files in test_autotb output	2020-05-02 11:21:01 +02:00
test_cell.cc	Add flooring modulo operator	2020-05-28 22:59:03 +02:00