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Right now neither `sat` nor `sim` have support for the `$check` cell. For formal verification it is a good idea to always run either async2sync or clk2fflogic which will (in a future commit) lower `$check` to `$assert`, etc. While `sim` should eventually support `$check` directly, using `async2sync` is ok for the current tests that use `sim`, so this commit also runs `async2sync` before running sim on designs containing assertions.
4 lines
122 B
Plaintext
4 lines
122 B
Plaintext
read_verilog -sv asserts.v
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hierarchy; proc; opt; async2sync
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sat -verify -seq 1 -set-at 1 rst 1 -tempinduct -prove-asserts
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