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yosys/techlibs
2020-05-14 10:33:57 -07:00
..
achronix
anlogic
common abc9: preserve $_DFF_?_.Q's (* init *); rely on clean to remove it 2020-05-14 10:33:57 -07:00
coolrunner2
easic
ecp5 ecp5: latches_map.v if *not* -asyncprld 2020-05-14 10:33:57 -07:00
efinix
gowin gowin,ecp5: remove generated files in make clean. 2020-04-24 23:26:39 +00:00
greenpak4
ice40 xilinx/ice40/ecp5: zinit requires selected wires, so select them all 2020-05-14 10:33:56 -07:00
intel
intel_alm
sf2
xilinx xilinx: gate specify/attributes from iverilog 2020-05-14 10:33:57 -07:00
.gitignore