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yosys/techlibs/gowin/brams.txt
YRabbit 26dc01102e GOWIN. Disable read-before-write mode.
According to the latest documentation from GOWIN -
"UG285-1.4E Gowin BSRAM & SSRAM User Guide"

The dual port BSRAM of all 55nm devices (including GW1N, GW2A and GW1A
series) does not support the read-before-write mode (WRITE_MODE = 2)

Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
2026-03-05 09:17:37 +10:00

80 lines
1.2 KiB
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ram block $__GOWIN_SP_ {
abits 14;
widths 1 2 4 9 18 36 per_port;
cost 128;
byte 9;
init no_undef;
port srsw "A" {
clock posedge;
clken;
option "RESET_MODE" "SYNC" {
rdsrst zero ungated;
}
option "RESET_MODE" "ASYNC" {
rdarst zero;
}
rdinit zero;
portoption "WRITE_MODE" 0 {
rdwr no_change;
}
portoption "WRITE_MODE" 1 {
rdwr new;
}
ifndef gw5a {
portoption "WRITE_MODE" 2 {
rdwr old;
}
}
wrbe_separate;
}
}
ram block $__GOWIN_DP_ {
abits 14;
widths 1 2 4 9 18 per_port;
cost 128;
byte 9;
init no_undef;
port srsw "A" "B" {
clock posedge;
clken;
option "RESET_MODE" "SYNC" {
rdsrst zero ungated;
}
option "RESET_MODE" "ASYNC" {
rdarst zero;
}
rdinit zero;
portoption "WRITE_MODE" 0 {
rdwr no_change;
}
portoption "WRITE_MODE" 1 {
rdwr new;
}
wrbe_separate;
}
}
ram block $__GOWIN_SDP_ {
abits 14;
widths 1 2 4 9 18 36 per_port;
cost 128;
byte 9;
init no_undef;
port sr "R" {
clock posedge;
clken;
option "RESET_MODE" "SYNC" {
rdsrst zero ungated;
}
option "RESET_MODE" "ASYNC" {
rdarst zero;
}
rdinit zero;
}
port sw "W" {
clock posedge;
clken;
wrbe_separate;
}
}