3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-06-01 11:51:21 +00:00
yosys/tests/verific
Akash Levy 0fd6e29e8e Fixups
2024-09-23 04:25:10 -07:00
..
.gitignore Add test example 2023-02-27 09:24:04 +01:00
bounds.vhd Add left and right bound properties to wire. Add test. Fix printing 2024-09-10 12:52:42 +02:00
bounds.ys.skip Clean up Verific tests 2024-09-23 04:05:08 -07:00
case.sv Add test example 2023-02-27 09:24:04 +01:00
case.ys Fixups 2024-09-23 04:25:10 -07:00
clocking.ys Clocking works with -formal flag 2024-09-22 08:01:16 -07:00
enum_values.sv verific: Fix enum_values support and signed attribute values 2023-03-15 09:51:36 +01:00
enum_values.ys verific: Fix enum_values support and signed attribute values 2023-03-15 09:51:36 +01:00
memory_semantics.ys.skip Clean up Verific tests 2024-09-23 04:05:08 -07:00
range_case.sv Added ranged case check 2023-02-27 09:24:04 +01:00
README.md Clean up Verific tests 2024-09-23 04:05:08 -07:00
rom_case.ys.skip Clean up Verific tests 2024-09-23 04:05:08 -07:00
run-test.sh Add test example 2023-02-27 09:24:04 +01:00

Verific Test Cases

Yosys Built-In

Working

  • clocking
  • enum

Skipped

  • bounds: checks top and bottom bound attributes, which are removed to avoid OpenSTA issues
  • memory_semantics: relies on initial values being retained, which is disabled
  • rom_case: relies on using Verific's frontend rather than GHDL, which is what we are using

Failing

  • case: checks that miter works with abstract case synthesis, but runs into issues with function