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Code Activity
yosys/tests/techmap
History
Marcelina Kościelnicka 4e70c30775 FfData: some refactoring. 
- FfData now keeps track of the module and underlying cell, if any (so
  calling emit on FfData created from a cell will replace the existing cell)
- FfData implementation is split off to its own .cc file for faster
  compilation
- the "flip FF data sense by inserting inverters in front and after"
  functionality that zinit uses is moved onto FfData class and beefed up
  to have dffsr support, to support more use cases
2021-10-07 04:24:06 +02:00
..
.gitignore tests/techmap/run-test.sh to cope with *.ys 2019-08-23 11:09:50 -07:00
abc9.ys Merge remote-tracking branch 'origin/master' into eddie/abc9_refactor 2020-01-15 16:42:16 -08:00
adff2dff.ys Add tests for some common techmap files. 2021-02-24 01:07:34 +01:00
aigmap.ys Add quick test 2019-09-30 15:34:04 -07:00
autopurge.ys Hell let's add the original #1381 testcase too 2019-09-20 17:58:51 -07:00
bug2183.ys flatten, techmap: don't canonicalize tpl driven bits via sigmap. 2020-08-26 16:29:42 +00:00
bug2321.ys techmap.CONSTMAP: Handle outputs before inputs. 2020-08-05 12:28:18 +02:00
bug2332.ys peeopt.shiftmul: Add a signedness check. 2020-08-05 21:01:20 +02:00
bug2759.ys abc9: holes module to instantiate cells with NEW_ID (#2992) 2021-09-09 10:06:20 -07:00
bug2972.ys abc9: make re-entrant (#2993) 2021-09-09 10:06:31 -07:00
cellname.ys techmap: Add _TECHMAP_CELLNAME_ special parameter. 2020-07-21 15:00:54 +02:00
clkbufmap.ys clkbufmap: improve input pad handling. 2020-07-09 18:48:01 +02:00
cmp2lcu.ys +/cmp2lcu.v to work efficiently for fully/partially constant inputs 2020-04-03 14:28:22 -07:00
dff2ff.ys Add tests for some common techmap files. 2021-02-24 01:07:34 +01:00
dffinit.ys dffinit: Avoid setting init parameter to zero-length value. 2020-04-14 19:52:19 +02:00
dfflegalize_adff.ys clk2fflogic: Support all FF types. 2020-07-24 03:19:48 +02:00
dfflegalize_adff_init.ys clk2fflogic: Support all FF types. 2020-07-24 03:19:48 +02:00
dfflegalize_adlatch.ys clk2fflogic: Support all FF types. 2020-07-24 03:19:48 +02:00
dfflegalize_adlatch_init.ys clk2fflogic: Support all FF types. 2020-07-24 03:19:48 +02:00
dfflegalize_dff.ys clk2fflogic: Support all FF types. 2020-07-24 03:19:48 +02:00
dfflegalize_dff_init.ys clk2fflogic: Support all FF types. 2020-07-24 03:19:48 +02:00
dfflegalize_dffsr.ys clk2fflogic: Support all FF types. 2020-07-24 03:19:48 +02:00
dfflegalize_dffsr_init.ys clk2fflogic: Support all FF types. 2020-07-24 03:19:48 +02:00
dfflegalize_dlatch.ys clk2fflogic: Support all FF types. 2020-07-24 03:19:48 +02:00
dfflegalize_dlatch_const.ys clk2fflogic: Support all FF types. 2020-07-24 03:19:48 +02:00
dfflegalize_dlatch_init.ys clk2fflogic: Support all FF types. 2020-07-24 03:19:48 +02:00
dfflegalize_dlatchsr.ys clk2fflogic: Support all FF types. 2020-07-24 03:19:48 +02:00
dfflegalize_dlatchsr_init.ys clk2fflogic: Support all FF types. 2020-07-24 03:19:48 +02:00
dfflegalize_inv.ys clk2fflogic: Support all FF types. 2020-07-24 03:19:48 +02:00
dfflegalize_mince.ys clk2fflogic: Support all FF types. 2020-07-24 03:19:48 +02:00
dfflegalize_minsrst.ys clk2fflogic: Support all FF types. 2020-07-24 03:19:48 +02:00
dfflegalize_sr.ys clk2fflogic: Support all FF types. 2020-07-24 03:19:48 +02:00
dfflegalize_sr_init.ys clk2fflogic: Support all FF types. 2020-07-24 03:19:48 +02:00
dfflibmap-sim.v dfflibmap: Refactor to use dfflegalize internally. 2020-07-09 18:51:03 +02:00
dfflibmap.lib dfflibmap: Refactor to use dfflegalize internally. 2020-07-09 18:51:03 +02:00
dfflibmap.ys dfflibmap: Refactor to use dfflegalize internally. 2020-07-09 18:51:03 +02:00
dffunmap.ys Add dffunmap pass. 2020-07-31 00:59:51 +02:00
extractinv.ys Added extractinv pass 2019-09-19 04:02:48 +02:00
iopadmap.ys opt_clean: Make the init attribute follow the FF's Q. 2021-08-22 15:38:29 +02:00
mem_simple_4x1_cells.v Added tests/techmap/mem_simple_4x1 2014-02-21 12:06:40 +01:00
mem_simple_4x1_map.v Added read-enable to memory model 2015-09-25 12:23:11 +02:00
mem_simple_4x1_runtest.sh tests: Centralize test collection and Makefile generation 2020-09-21 15:07:02 +02:00
mem_simple_4x1_tb.v Added tests/techmap/mem_simple_4x1 2014-02-21 12:06:40 +01:00
mem_simple_4x1_uut.v Added tests/techmap/mem_simple_4x1 2014-02-21 12:06:40 +01:00
pmux2mux.ys Add tests for some common techmap files. 2021-02-24 01:07:34 +01:00
recursive.v Add test 2019-08-20 20:05:16 -07:00
recursive_map.v Add test 2019-08-20 20:05:16 -07:00
recursive_runtest.sh tests: Centralize test collection and Makefile generation 2020-09-21 15:07:02 +02:00
run-test.sh tests: Centralize test collection and Makefile generation 2020-09-21 15:07:02 +02:00
shiftx2mux.ys techmap/shift_shiftx: Remove the "shiftx2mux" special path. 2020-08-20 12:44:09 +02:00
techmap_replace.ys techmap: Fix cell names with _TECHMAP_REPLACE_.* 2020-03-23 11:17:07 +01:00
wireinit.ys Fix _TECHMAP_REMOVEINIT_ handling. 2019-09-27 18:34:12 +02:00
zinit.ys FfData: some refactoring. 2021-10-07 04:24:06 +02:00