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* add simulation model for block RAM cascade in 40K mode * limit 20K_SDP and 40K_SDP to 40 and 80 bits (the only useful configurations) |
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| .. | ||
| arith_map.v | ||
| brams.txt | ||
| brams_init_20.vh | ||
| brams_init_40.vh | ||
| brams_map.v | ||
| cells_bb.v | ||
| cells_sim.v | ||
| lut_map.v | ||
| Makefile.inc | ||
| mul_map.v | ||
| mux_map.v | ||
| reg_map.v | ||
| synth_gatemate.cc | ||