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33 lines
1.8 KiB
Text
33 lines
1.8 KiB
Text
read_verilog proc_mux_src.v
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proc -noopt
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check -assert
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# eq refer to the values compared against
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select -assert-count 2 tiny2/t:$eq
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select -assert-count 1 tiny2/t:$eq a:src=proc_mux_src.v:81.4-81.10 %i
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select -assert-count 1 tiny2/t:$eq a:src=proc_mux_src.v:84.4-84.10 %i
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# Flops cover the whole process
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select -assert-count 1 tiny2/t:$dff
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select -assert-count 1 tiny2/t:$dff a:src=proc_mux_src.v:78.2-91.5 %i
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# Muxes are marked to the exact assignment statements they represent including the explicit default case
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select -assert-count 1 tiny2/t:$pmux
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select -assert-count 1 tiny2/t:$pmux a:src=proc_mux_src.v:80.5-80.13|proc_mux_src.v:83.5-83.15|proc_mux_src.v:86.5-86.15
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select -assert-count 0 tiny/t:$reduce_or
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# Implicit default cases add src attributes to muxes that cover the whole switch
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select -assert-count 1 tiny/t:$mux
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select -assert-count 1 tiny/t:$mux a:proc_mux_src.v:65.5-65.13|proc_mux_src.v:63.3-67.10
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select -assert-count 0 tiny/t:$reduce_or
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dump nested
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#dump nested/t:$pmux
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# $reduce_or src covers the entire list of comparison RHSs
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# Each snippet is treated separately so it gets its own $eq and $reduce_or etc
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select -assert-count 3 nested/t:$reduce_or
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select -assert-count 3 nested/t:$reduce_or a:src=proc_mux_src.v:25.4-25.19 %i
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# When switches are nested, the top mux considers the inner switch the entire source
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# for one of its inputs. Here, that's proc_mux_src.v:32.5-45.12
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select -assert-count 5 nested/t:$pmux
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select -assert-count 1 nested/t:$pmux a:src=proc_mux_src.v:21.5-21.20|proc_mux_src.v:26.5-26.20|proc_mux_src.v:32.5-45.12|proc_mux_src.v:48.5-48.19 %i
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# No nesting for output reg arith
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select -assert-count 1 nested/t:$pmux a:src=proc_mux_src.v:23.5-23.18|proc_mux_src.v:28.5-28.18|proc_mux_src.v:31.5-31.18|proc_mux_src.v:50.5-50.18 %i
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dump nested/t:$pmux
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