Eddie Hung 2c0be7aa5d Rework ice40_dsp to map to SB_MAC16 earlier, and check before packing		2019-08-08 12:56:05 -07:00
..
tests	ice40: Fix test_dsp_model.sh	2019-07-19 17:33:57 +01:00
.gitignore
abc_hx.box
abc_hx.lut
abc_lp.box
abc_lp.lut
abc_u.box
abc_u.lut
arith_map.v
brams.txt
brams_init.py
brams_map.v
cells_map.v
cells_sim.v	ice40/cells_sim.v: Fix sign of J and K partial products	2019-07-19 17:33:41 +01:00
dsp_map.v	Rework ice40_dsp to map to SB_MAC16 earlier, and check before packing	2019-08-08 12:56:05 -07:00
ice40_braminit.cc
ice40_ffinit.cc
ice40_ffssr.cc
ice40_opt.cc
ice40_unlut.cc	ice40: Adapt the relut process passes to the new $lut <=> SB_LUT4 port map	2019-07-16 23:57:15 +02:00
latches_map.v
Makefile.inc	Rework ice40_dsp to map to SB_MAC16 earlier, and check before packing	2019-08-08 12:56:05 -07:00
synth_ice40.cc	Rework ice40_dsp to map to SB_MAC16 earlier, and check before packing	2019-08-08 12:56:05 -07:00