mirror of
https://github.com/YosysHQ/yosys
synced 2025-11-04 13:29:12 +00:00
881 lines
26 KiB
C++
881 lines
26 KiB
C++
/*
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* yosys -- Yosys Open SYnthesis Suite
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*
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* Copyright (C) 2020 whitequark <whitequark@whitequark.org>
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*
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*/
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#include "libs/bigint/BigUnsigned.hh"
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#include "kernel/fmt.h"
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USING_YOSYS_NAMESPACE
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void Fmt::append_literal(const std::string &str) {
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FmtPart part = {};
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part.type = FmtPart::LITERAL;
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part.str = str;
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parts.push_back(part);
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}
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void Fmt::parse_rtlil(const RTLIL::Cell *cell) {
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std::string fmt = cell->getParam(ID(FORMAT)).decode_string();
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RTLIL::SigSpec args = cell->getPort(ID(ARGS));
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parts.clear();
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FmtPart part;
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for (size_t i = 0; i < fmt.size(); i++) {
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if (fmt.substr(i, 2) == "}}") {
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part.str += '}';
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++i;
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} else if (fmt.substr(i, 2) == "{{") {
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part.str += '{';
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++i;
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} else if (fmt[i] == '}') {
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log_assert(false && "Unexpected '}' in format string");
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} else if (fmt[i] == '{') {
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if (!part.str.empty()) {
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part.type = FmtPart::LITERAL;
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parts.push_back(part);
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part = {};
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}
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if (++i == fmt.size())
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log_assert(false && "Unexpected end in format substitution");
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size_t arg_size = 0;
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for (; i < fmt.size(); i++) {
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if (fmt[i] >= '0' && fmt[i] <= '9') {
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arg_size *= 10;
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arg_size += fmt[i] - '0';
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} else if (fmt[i] == ':') {
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++i;
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break;
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} else {
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log_assert(false && "Unexpected character in format substitution");
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}
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}
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if (i == fmt.size())
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log_assert(false && "Unexpected end in format substitution");
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if ((size_t)args.size() < arg_size)
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log_assert(false && "Format part overruns arguments");
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part.sig = args.extract(0, arg_size);
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args.remove(0, arg_size);
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if (fmt[i] == 'U') {
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part.type = FmtPart::UNICHAR;
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++i;
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goto success;
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}
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if (fmt[i] == '>')
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part.justify = FmtPart::RIGHT;
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else if (fmt[i] == '<')
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part.justify = FmtPart::LEFT;
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else if (fmt[i] == '=')
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part.justify = FmtPart::NUMERIC;
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else
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log_assert(false && "Unexpected justification in format substitution");
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if (++i == fmt.size())
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log_assert(false && "Unexpected end in format substitution");
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part.padding = fmt[i];
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if (++i == fmt.size())
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log_assert(false && "Unexpected end in format substitution");
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for (; i < fmt.size(); i++) {
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if (fmt[i] >= '0' && fmt[i] <= '9') {
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part.width *= 10;
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part.width += fmt[i] - '0';
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continue;
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} else if (fmt[i] == 'b') {
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part.type = FmtPart::INTEGER;
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part.base = 2;
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} else if (fmt[i] == 'o') {
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part.type = FmtPart::INTEGER;
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part.base = 8;
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} else if (fmt[i] == 'd') {
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part.type = FmtPart::INTEGER;
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part.base = 10;
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} else if (fmt[i] == 'h') {
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part.type = FmtPart::INTEGER;
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part.base = 16;
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} else if (fmt[i] == 'H') {
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part.type = FmtPart::INTEGER;
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part.base = 16;
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part.hex_upper = true;
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} else if (fmt[i] == 'c') {
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part.type = FmtPart::STRING;
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} else if (fmt[i] == 't') {
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part.type = FmtPart::VLOG_TIME;
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} else if (fmt[i] == 'r') {
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part.type = FmtPart::VLOG_TIME;
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part.realtime = true;
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} else {
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log_assert(false && "Unexpected character in format substitution");
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}
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++i;
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break;
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}
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if (i == fmt.size())
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log_assert(false && "Unexpected end in format substitution");
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if (part.type == FmtPart::INTEGER) {
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if (fmt[i] == '-') {
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part.sign = FmtPart::MINUS;
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if (++i == fmt.size())
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log_assert(false && "Unexpected end in format substitution");
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} else if (fmt[i] == '+') {
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part.sign = FmtPart::PLUS_MINUS;
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if (++i == fmt.size())
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log_assert(false && "Unexpected end in format substitution");
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} else if (fmt[i] == ' ') {
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part.sign = FmtPart::SPACE_MINUS;
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if (++i == fmt.size())
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log_assert(false && "Unexpected end in format substitution");
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} else {
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// also accept no sign character and treat like MINUS for compatibility
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}
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if (fmt[i] == '#') {
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part.show_base = true;
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++i;
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}
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if (fmt[i] == '_') {
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part.group = true;
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++i;
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}
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if (fmt[i] == 'u')
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part.signed_ = false;
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else if (fmt[i] == 's')
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part.signed_ = true;
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else
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log_assert(false && "Unexpected character in format substitution");
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if (++i == fmt.size())
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log_assert(false && "Unexpected end in format substitution");
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}
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success:
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if (fmt[i] != '}')
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log_assert(false && "Expected '}' after format substitution");
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parts.push_back(part);
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part = {};
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} else {
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part.str += fmt[i];
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}
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}
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if (!part.str.empty()) {
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part.type = FmtPart::LITERAL;
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parts.push_back(part);
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}
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}
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void Fmt::emit_rtlil(RTLIL::Cell *cell) const {
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std::string fmt;
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RTLIL::SigSpec args;
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for (auto &part : parts) {
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switch (part.type) {
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case FmtPart::LITERAL:
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for (char c : part.str) {
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if (c == '{')
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fmt += "{{";
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else if (c == '}')
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fmt += "}}";
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else
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fmt += c;
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}
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break;
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case FmtPart::UNICHAR:
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log_assert(part.sig.size() <= 32);
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fmt += "{U}";
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break;
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case FmtPart::VLOG_TIME:
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log_assert(part.sig.size() == 0);
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YS_FALLTHROUGH
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case FmtPart::STRING:
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log_assert(part.sig.size() % 8 == 0);
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YS_FALLTHROUGH
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case FmtPart::INTEGER:
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args.append(part.sig);
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fmt += '{';
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fmt += std::to_string(part.sig.size());
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fmt += ':';
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if (part.justify == FmtPart::RIGHT)
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fmt += '>';
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else if (part.justify == FmtPart::LEFT)
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fmt += '<';
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else if (part.justify == FmtPart::NUMERIC)
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fmt += '=';
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else log_abort();
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log_assert(part.width == 0 || part.padding != '\0');
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fmt += part.padding != '\0' ? part.padding : ' ';
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if (part.width > 0)
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fmt += std::to_string(part.width);
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if (part.type == FmtPart::INTEGER) {
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switch (part.base) {
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case 2: fmt += 'b'; break;
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case 8: fmt += 'o'; break;
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case 10: fmt += 'd'; break;
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case 16: fmt += part.hex_upper ? 'H' : 'h'; break;
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default: log_abort();
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}
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switch (part.sign) {
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case FmtPart::MINUS: fmt += '-'; break;
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case FmtPart::PLUS_MINUS: fmt += '+'; break;
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case FmtPart::SPACE_MINUS: fmt += ' '; break;
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}
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fmt += part.show_base ? "#" : "";
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fmt += part.group ? "_" : "";
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fmt += part.signed_ ? 's' : 'u';
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} else if (part.type == FmtPart::STRING) {
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fmt += 'c';
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} else if (part.type == FmtPart::VLOG_TIME) {
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if (part.realtime)
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fmt += 'r';
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else
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fmt += 't';
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} else log_abort();
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fmt += '}';
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break;
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default: log_abort();
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}
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}
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cell->setParam(ID(FORMAT), fmt);
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cell->setParam(ID(ARGS_WIDTH), args.size());
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cell->setPort(ID(ARGS), args);
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}
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static size_t compute_required_decimal_places(size_t size, bool signed_)
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{
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BigUnsigned max;
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if (!signed_)
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max.setBit(size, true);
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else
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max.setBit(size - 1, true);
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size_t places = 0;
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while (!max.isZero()) {
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places++;
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max /= 10;
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}
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if (signed_)
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places++;
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return places;
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}
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static size_t compute_required_nondecimal_places(size_t size, unsigned base)
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{
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log_assert(base != 10);
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BigUnsigned max;
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max.setBit(size - 1, true);
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size_t places = 0;
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while (!max.isZero()) {
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places++;
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max /= base;
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}
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return places;
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}
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// Only called for integers, either when:
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//
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// (a) passed without a format string (e.g. "$display(a);"), or
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//
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// (b) the corresponding format specifier has no leading zero, e.g. "%b",
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// "%20h", "%-10d".
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//
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// In these cases, for binary/octal/hex, we always zero-pad to the size of the
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// signal; i.e. whether "%h" or "%10h" or "%-20h" is used, if the corresponding
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// signal is 32'h1234, "00001234" will always be a substring of the output.
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//
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// For case (a), we have no specified width, so there is nothing more to do.
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//
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// For case (b), because we are only called with no leading zero on the
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// specifier, any specified width beyond the signal size is therefore space
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// padding, whatever the justification.
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//
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// For decimal, we do no zero-padding, instead space-padding to the size
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// required for the signal's largest value. This is per other Verilog
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// implementations, and intuitively makes sense as decimal representations lack
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// a discrete mapping of digits to bit groups. Decimals may also show sign and
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// must accommodate this, whereas other representations do not.
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void Fmt::apply_verilog_automatic_sizing_and_add(FmtPart &part)
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{
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if (part.base == 10) {
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size_t places = compute_required_decimal_places(part.sig.size(), part.signed_);
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part.padding = ' ';
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part.width = std::max(part.width, places);
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parts.push_back(part);
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return;
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}
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part.padding = '0';
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size_t places = compute_required_nondecimal_places(part.sig.size(), part.base);
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if (part.width < places) {
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part.justify = FmtPart::RIGHT;
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part.width = places;
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parts.push_back(part);
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} else if (part.width == places) {
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parts.push_back(part);
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} else if (part.width > places) {
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auto gap = std::string(part.width - places, ' ');
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part.width = places;
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if (part.justify == FmtPart::RIGHT) {
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append_literal(gap);
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parts.push_back(part);
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} else {
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part.justify = FmtPart::RIGHT;
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parts.push_back(part);
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append_literal(gap);
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}
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}
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}
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void Fmt::parse_verilog(const std::vector<VerilogFmtArg> &args, bool sformat_like, int default_base, RTLIL::IdString task_name, RTLIL::IdString module_name)
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{
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parts.clear();
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auto arg = args.begin();
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for (; arg != args.end(); ++arg) {
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switch (arg->type) {
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case VerilogFmtArg::INTEGER: {
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FmtPart part = {};
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part.type = FmtPart::INTEGER;
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part.sig = arg->sig;
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part.base = default_base;
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part.signed_ = arg->signed_;
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apply_verilog_automatic_sizing_and_add(part);
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break;
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}
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case VerilogFmtArg::TIME: {
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FmtPart part = {};
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part.type = FmtPart::VLOG_TIME;
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part.realtime = arg->realtime;
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part.padding = ' ';
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part.width = 20;
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parts.push_back(part);
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break;
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}
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case VerilogFmtArg::STRING: {
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if (arg == args.begin() || !sformat_like) {
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const auto fmtarg = arg;
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const std::string &fmt = fmtarg->str;
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FmtPart part = {};
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for (size_t i = 0; i < fmt.size(); i++) {
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if (fmt[i] != '%') {
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part.str += fmt[i];
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} else if (fmt.substr(i, 2) == "%%") {
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i++;
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part.str += '%';
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} else if (fmt.substr(i, 2) == "%l" || fmt.substr(i, 2) == "%L") {
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i++;
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part.str += module_name.str();
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} else if (fmt.substr(i, 2) == "%m" || fmt.substr(i, 2) == "%M") {
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i++;
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part.str += module_name.str();
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} else {
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if (!part.str.empty()) {
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part.type = FmtPart::LITERAL;
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parts.push_back(part);
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part = {};
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}
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if (++i == fmt.size()) {
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log_file_error(fmtarg->filename, fmtarg->first_line, "System task `%s' called with incomplete format specifier in argument %zu.\n", task_name.c_str(), fmtarg - args.begin() + 1);
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}
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if (++arg == args.end()) {
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log_file_error(fmtarg->filename, fmtarg->first_line, "System task `%s' called with fewer arguments than the format specifiers in argument %zu require.\n", task_name.c_str(), fmtarg - args.begin() + 1);
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}
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part.sig = arg->sig;
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part.signed_ = arg->signed_;
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for (; i < fmt.size(); i++) {
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if (fmt[i] == '-') {
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// left justify; not in IEEE 1800-2017 or verilator but iverilog has it
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part.justify = FmtPart::LEFT;
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} else if (fmt[i] == '+') {
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// always show sign; not in IEEE 1800-2017 or verilator but iverilog has it
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part.sign = FmtPart::PLUS_MINUS;
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} else break;
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}
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if (i == fmt.size()) {
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log_file_error(fmtarg->filename, fmtarg->first_line, "System task `%s' called with incomplete format specifier in argument %zu.\n", task_name.c_str(), fmtarg - args.begin() + 1);
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}
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bool has_leading_zero = false, has_width = false;
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for (; i < fmt.size(); i++) {
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if (fmt[i] >= '0' && fmt[i] <= '9') {
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if (fmt[i] == '0' && !has_width) {
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has_leading_zero = true;
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} else {
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has_width = true;
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part.width *= 10;
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part.width += fmt[i] - '0';
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}
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continue;
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} else if (fmt[i] == 'b' || fmt[i] == 'B') {
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part.type = FmtPart::INTEGER;
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part.base = 2;
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} else if (fmt[i] == 'o' || fmt[i] == 'O') {
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part.type = FmtPart::INTEGER;
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part.base = 8;
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} else if (fmt[i] == 'd' || fmt[i] == 'D') {
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part.type = FmtPart::INTEGER;
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part.base = 10;
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} else if (fmt[i] == 'h' || fmt[i] == 'H' ||
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fmt[i] == 'x' || fmt[i] == 'X') {
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// hex digits always printed in lowercase for %h%x as well as %H%X
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part.type = FmtPart::INTEGER;
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part.base = 16;
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} else if (fmt[i] == 'c' || fmt[i] == 'C') {
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part.type = FmtPart::STRING;
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part.sig.extend_u0(8);
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// %10c and %010c not fully defined in IEEE 1800-2017 and do different things in iverilog
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} else if (fmt[i] == 's' || fmt[i] == 'S') {
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part.type = FmtPart::STRING;
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if ((part.sig.size() % 8) != 0)
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part.sig.extend_u0((part.sig.size() + 7) / 8 * 8);
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// %10s and %010s not fully defined in IEEE 1800-2017 and do the same thing in iverilog
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part.padding = ' ';
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} else if (fmt[i] == 't' || fmt[i] == 'T') {
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if (arg->type == VerilogFmtArg::TIME) {
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part.type = FmtPart::VLOG_TIME;
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part.realtime = arg->realtime;
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if (!has_width && !has_leading_zero)
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part.width = 20;
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} else {
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log_file_error(fmtarg->filename, fmtarg->first_line, "System task `%s' called with format character `%c' in argument %zu, but the argument is not $time or $realtime.\n", task_name.c_str(), fmt[i], fmtarg - args.begin() + 1);
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}
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} else {
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log_file_error(fmtarg->filename, fmtarg->first_line, "System task `%s' called with unrecognized format character `%c' in argument %zu.\n", task_name.c_str(), fmt[i], fmtarg - args.begin() + 1);
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}
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break;
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}
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if (i == fmt.size()) {
|
|
log_file_error(fmtarg->filename, fmtarg->first_line, "System task `%s' called with incomplete format specifier in argument %zu.\n", task_name.c_str(), fmtarg - args.begin() + 1);
|
|
}
|
|
|
|
if (part.padding == '\0') {
|
|
if (has_leading_zero && part.justify == FmtPart::RIGHT) {
|
|
part.padding = '0';
|
|
part.justify = FmtPart::NUMERIC;
|
|
} else {
|
|
part.padding = ' ';
|
|
}
|
|
}
|
|
|
|
if (part.type == FmtPart::INTEGER && part.base != 10 && part.sign != FmtPart::MINUS)
|
|
log_file_error(fmtarg->filename, fmtarg->first_line, "System task `%s' called with invalid format specifier in argument %zu.\n", task_name.c_str(), fmtarg - args.begin() + 1);
|
|
|
|
if (part.base != 10)
|
|
part.signed_ = false;
|
|
if (part.type == FmtPart::INTEGER && !has_leading_zero)
|
|
apply_verilog_automatic_sizing_and_add(part);
|
|
else
|
|
parts.push_back(part);
|
|
part = {};
|
|
}
|
|
}
|
|
if (!part.str.empty()) {
|
|
part.type = FmtPart::LITERAL;
|
|
parts.push_back(part);
|
|
}
|
|
} else {
|
|
FmtPart part = {};
|
|
part.type = FmtPart::LITERAL;
|
|
part.str = arg->str;
|
|
parts.push_back(part);
|
|
}
|
|
break;
|
|
}
|
|
|
|
default: log_abort();
|
|
}
|
|
}
|
|
}
|
|
|
|
std::vector<VerilogFmtArg> Fmt::emit_verilog() const
|
|
{
|
|
std::vector<VerilogFmtArg> args;
|
|
VerilogFmtArg fmt = {};
|
|
fmt.type = VerilogFmtArg::STRING;
|
|
|
|
for (auto &part : parts) {
|
|
switch (part.type) {
|
|
case FmtPart::LITERAL:
|
|
for (char c : part.str) {
|
|
if (c == '%')
|
|
fmt.str += "%%";
|
|
else
|
|
fmt.str += c;
|
|
}
|
|
break;
|
|
|
|
case FmtPart::INTEGER: {
|
|
VerilogFmtArg arg = {};
|
|
arg.type = VerilogFmtArg::INTEGER;
|
|
arg.sig = part.sig;
|
|
arg.signed_ = part.signed_;
|
|
args.push_back(arg);
|
|
|
|
fmt.str += '%';
|
|
if (part.sign == FmtPart::PLUS_MINUS || part.sign == FmtPart::SPACE_MINUS)
|
|
fmt.str += '+'; // treat space/minus as plus/minus
|
|
if (part.justify == FmtPart::LEFT)
|
|
fmt.str += '-';
|
|
if (part.width == 0) {
|
|
fmt.str += '0';
|
|
} else if (part.width > 0) {
|
|
if (part.base != 10 || part.padding == '0')
|
|
fmt.str += '0';
|
|
fmt.str += std::to_string(part.width);
|
|
}
|
|
switch (part.base) {
|
|
case 2: fmt.str += 'b'; break;
|
|
case 8: fmt.str += 'o'; break;
|
|
case 10: fmt.str += 'd'; break;
|
|
case 16: fmt.str += 'h'; break; // treat uppercase hex as lowercase
|
|
default: log_abort();
|
|
}
|
|
break;
|
|
}
|
|
|
|
case FmtPart::STRING: {
|
|
VerilogFmtArg arg;
|
|
arg.type = VerilogFmtArg::INTEGER;
|
|
arg.sig = part.sig;
|
|
args.push_back(arg);
|
|
|
|
fmt.str += '%';
|
|
if (part.justify == FmtPart::LEFT)
|
|
fmt.str += '-';
|
|
if (part.sig.size() == 8) {
|
|
if (part.width > 0) {
|
|
if (part.padding == '0')
|
|
fmt.str += part.padding;
|
|
fmt.str += std::to_string(part.width);
|
|
}
|
|
fmt.str += 'c';
|
|
} else {
|
|
log_assert(part.sig.size() % 8 == 0);
|
|
if (part.width > 0) {
|
|
fmt.str += std::to_string(part.width);
|
|
}
|
|
fmt.str += 's';
|
|
}
|
|
break;
|
|
}
|
|
|
|
case FmtPart::UNICHAR: {
|
|
VerilogFmtArg arg;
|
|
arg.type = VerilogFmtArg::INTEGER;
|
|
arg.sig = part.sig.extract(0, 7); // only ASCII
|
|
args.push_back(arg);
|
|
|
|
fmt.str += "%c";
|
|
break;
|
|
}
|
|
|
|
case FmtPart::VLOG_TIME: {
|
|
VerilogFmtArg arg;
|
|
arg.type = VerilogFmtArg::TIME;
|
|
if (part.realtime)
|
|
arg.realtime = true;
|
|
args.push_back(arg);
|
|
|
|
fmt.str += '%';
|
|
log_assert(part.sign == FmtPart::MINUS || part.sign == FmtPart::PLUS_MINUS);
|
|
if (part.sign == FmtPart::PLUS_MINUS)
|
|
fmt.str += '+';
|
|
if (part.justify == FmtPart::LEFT)
|
|
fmt.str += '-';
|
|
if (part.padding == '0' && part.width > 0)
|
|
fmt.str += '0';
|
|
fmt.str += std::to_string(part.width);
|
|
fmt.str += 't';
|
|
break;
|
|
}
|
|
|
|
default: log_abort();
|
|
}
|
|
}
|
|
|
|
args.insert(args.begin(), fmt);
|
|
return args;
|
|
}
|
|
|
|
std::string escape_cxx_string(const std::string &input)
|
|
{
|
|
std::string output = "\"";
|
|
for (auto c : input) {
|
|
if (::isprint(c)) {
|
|
if (c == '\\' || c == '"')
|
|
output.push_back('\\');
|
|
output.push_back(c);
|
|
} else {
|
|
char l = c & 0x7, m = (c >> 3) & 0x7, h = (c >> 6) & 0x3;
|
|
output.push_back('\\');
|
|
output.push_back('0' + h);
|
|
output.push_back('0' + m);
|
|
output.push_back('0' + l);
|
|
}
|
|
}
|
|
output.push_back('"');
|
|
if (output.find('\0') != std::string::npos) {
|
|
output.insert(0, "std::string {");
|
|
output.append(stringf(", %zu}", input.size()));
|
|
}
|
|
return output;
|
|
}
|
|
|
|
void Fmt::emit_cxxrtl(std::ostream &os, std::string indent, std::function<void(const RTLIL::SigSpec &)> emit_sig, const std::string &context) const
|
|
{
|
|
os << indent << "std::string buf;\n";
|
|
for (auto &part : parts) {
|
|
os << indent << "buf += fmt_part { ";
|
|
os << "fmt_part::";
|
|
switch (part.type) {
|
|
case FmtPart::LITERAL: os << "LITERAL"; break;
|
|
case FmtPart::INTEGER: os << "INTEGER"; break;
|
|
case FmtPart::STRING: os << "STRING"; break;
|
|
case FmtPart::UNICHAR: os << "UNICHAR"; break;
|
|
case FmtPart::VLOG_TIME: os << "VLOG_TIME"; break;
|
|
}
|
|
os << ", ";
|
|
os << escape_cxx_string(part.str) << ", ";
|
|
os << "fmt_part::";
|
|
switch (part.justify) {
|
|
case FmtPart::LEFT: os << "LEFT"; break;
|
|
case FmtPart::RIGHT: os << "RIGHT"; break;
|
|
case FmtPart::NUMERIC: os << "NUMERIC"; break;
|
|
}
|
|
os << ", ";
|
|
os << "(char)" << (int)part.padding << ", ";
|
|
os << part.width << ", ";
|
|
os << part.base << ", ";
|
|
os << part.signed_ << ", ";
|
|
os << "fmt_part::";
|
|
switch (part.sign) {
|
|
case FmtPart::MINUS: os << "MINUS"; break;
|
|
case FmtPart::PLUS_MINUS: os << "PLUS_MINUS"; break;
|
|
case FmtPart::SPACE_MINUS: os << "SPACE_MINUS"; break;
|
|
}
|
|
os << ", ";
|
|
os << part.hex_upper << ", ";
|
|
os << part.show_base << ", ";
|
|
os << part.group << ", ";
|
|
os << part.realtime;
|
|
os << " }.render(";
|
|
emit_sig(part.sig);
|
|
os << ", " << context << ");\n";
|
|
}
|
|
os << indent << "return buf;\n";
|
|
}
|
|
|
|
std::string Fmt::render() const
|
|
{
|
|
std::string str;
|
|
|
|
for (auto &part : parts) {
|
|
switch (part.type) {
|
|
case FmtPart::LITERAL:
|
|
str += part.str;
|
|
break;
|
|
|
|
case FmtPart::UNICHAR: {
|
|
RTLIL::Const value = part.sig.as_const();
|
|
uint32_t codepoint = value.as_int();
|
|
if (codepoint >= 0x10000)
|
|
str += (char)(0xf0 | (codepoint >> 18));
|
|
else if (codepoint >= 0x800)
|
|
str += (char)(0xe0 | (codepoint >> 12));
|
|
else if (codepoint >= 0x80)
|
|
str += (char)(0xc0 | (codepoint >> 6));
|
|
else
|
|
str += (char)codepoint;
|
|
if (codepoint >= 0x10000)
|
|
str += (char)(0x80 | ((codepoint >> 12) & 0x3f));
|
|
if (codepoint >= 0x800)
|
|
str += (char)(0x80 | ((codepoint >> 6) & 0x3f));
|
|
if (codepoint >= 0x80)
|
|
str += (char)(0x80 | ((codepoint >> 0) & 0x3f));
|
|
break;
|
|
}
|
|
|
|
case FmtPart::INTEGER:
|
|
case FmtPart::STRING:
|
|
case FmtPart::VLOG_TIME: {
|
|
std::string buf;
|
|
std::string prefix;
|
|
if (part.type == FmtPart::INTEGER) {
|
|
RTLIL::Const value = part.sig.as_const();
|
|
bool has_x = false, all_x = true, has_z = false, all_z = true;
|
|
for (State bit : value) {
|
|
if (bit == State::Sx)
|
|
has_x = true;
|
|
else
|
|
all_x = false;
|
|
if (bit == State::Sz)
|
|
has_z = true;
|
|
else
|
|
all_z = false;
|
|
}
|
|
|
|
if (!has_z && !has_x && part.signed_ && value[value.size() - 1]) {
|
|
prefix = "-";
|
|
value = RTLIL::const_neg(value, {}, part.signed_, {}, value.size() + 1);
|
|
} else {
|
|
switch (part.sign) {
|
|
case FmtPart::MINUS: break;
|
|
case FmtPart::PLUS_MINUS: prefix = "+"; break;
|
|
case FmtPart::SPACE_MINUS: prefix = " "; break;
|
|
}
|
|
}
|
|
|
|
if (part.base != 10) {
|
|
size_t minimum_size = 1;
|
|
for (size_t index = 0; index < (size_t)value.size(); index++)
|
|
if (value[index] != State::S0)
|
|
minimum_size = index + 1;
|
|
value = value.extract(0, minimum_size);
|
|
}
|
|
|
|
if (part.base == 2) {
|
|
if (part.show_base)
|
|
prefix += "0b";
|
|
for (size_t index = 0; index < (size_t)value.size(); index++) {
|
|
if (part.group && index > 0 && index % 4 == 0)
|
|
buf += '_';
|
|
RTLIL::State bit = value[index];
|
|
if (bit == State::Sx)
|
|
buf += 'x';
|
|
else if (bit == State::Sz)
|
|
buf += 'z';
|
|
else if (bit == State::S1)
|
|
buf += '1';
|
|
else /* if (bit == State::S0) */
|
|
buf += '0';
|
|
}
|
|
} else if (part.base == 8 || part.base == 16) {
|
|
if (part.show_base)
|
|
prefix += (part.base == 16) ? (part.hex_upper ? "0X" : "0x") : "0o";
|
|
size_t step = (part.base == 16) ? 4 : 3;
|
|
for (size_t index = 0; index < (size_t)value.size(); index += step) {
|
|
if (part.group && index > 0 && index % (4 * step) == 0)
|
|
buf += '_';
|
|
RTLIL::Const subvalue = value.extract(index, min(step, value.size() - index));
|
|
bool has_x = false, all_x = true, has_z = false, all_z = true;
|
|
for (State bit : subvalue) {
|
|
if (bit == State::Sx)
|
|
has_x = true;
|
|
else
|
|
all_x = false;
|
|
if (bit == State::Sz)
|
|
has_z = true;
|
|
else
|
|
all_z = false;
|
|
}
|
|
if (all_x)
|
|
buf += 'x';
|
|
else if (all_z)
|
|
buf += 'z';
|
|
else if (has_x)
|
|
buf += 'X';
|
|
else if (has_z)
|
|
buf += 'Z';
|
|
else
|
|
buf += (part.hex_upper ? "0123456789ABCDEF" : "0123456789abcdef")[subvalue.as_int()];
|
|
}
|
|
} else if (part.base == 10) {
|
|
if (part.show_base)
|
|
prefix += "0d";
|
|
if (all_x)
|
|
buf += 'x';
|
|
else if (all_z)
|
|
buf += 'z';
|
|
else if (has_x)
|
|
buf += 'X';
|
|
else if (has_z)
|
|
buf += 'Z';
|
|
else {
|
|
log_assert(value.is_fully_def());
|
|
if (value.is_fully_zero())
|
|
buf += '0';
|
|
size_t index = 0;
|
|
while (!value.is_fully_zero()) {
|
|
if (part.group && index > 0 && index % 3 == 0)
|
|
buf += '_';
|
|
buf += '0' + RTLIL::const_mod(value, 10, false, false, 4).as_int();
|
|
value = RTLIL::const_div(value, 10, false, false, value.size());
|
|
index++;
|
|
}
|
|
}
|
|
} else log_abort();
|
|
if (part.justify == FmtPart::NUMERIC && part.group && part.padding == '0') {
|
|
size_t group_size = part.base == 10 ? 3 : 4;
|
|
while (prefix.size() + buf.size() < part.width) {
|
|
if (buf.size() % (group_size + 1) == group_size)
|
|
buf += '_';
|
|
buf += '0';
|
|
}
|
|
}
|
|
std::reverse(buf.begin(), buf.end());
|
|
} else if (part.type == FmtPart::STRING) {
|
|
buf = part.sig.as_const().decode_string();
|
|
} else if (part.type == FmtPart::VLOG_TIME) {
|
|
// We only render() during initial, so time is always zero.
|
|
buf = "0";
|
|
}
|
|
|
|
log_assert(part.width == 0 || part.padding != '\0');
|
|
if (prefix.size() + buf.size() < part.width) {
|
|
size_t pad_width = part.width - prefix.size() - buf.size();
|
|
switch (part.justify) {
|
|
case FmtPart::LEFT:
|
|
str += prefix;
|
|
str += buf;
|
|
str += std::string(pad_width, part.padding);
|
|
break;
|
|
case FmtPart::RIGHT:
|
|
str += std::string(pad_width, part.padding);
|
|
str += prefix;
|
|
str += buf;
|
|
break;
|
|
case FmtPart::NUMERIC:
|
|
str += prefix;
|
|
str += std::string(pad_width, part.padding);
|
|
str += buf;
|
|
break;
|
|
}
|
|
} else {
|
|
str += prefix;
|
|
str += buf;
|
|
}
|
|
break;
|
|
}
|
|
}
|
|
}
|
|
|
|
return str;
|
|
}
|