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yosys/passes
Krystine Sherwin 237e454131
design.cc: Fix selections when copying
Use `Design::selected_modules()` directly, popping at the end instead of copying the selection.
Also default to a complete selection so that boxes work as before.
Simplify to using `RTLIL::SELECT_WHOLE_CMDERR` instead of doing it manually.
Also add tests for importing selections with boxes.
2025-04-08 16:35:12 +12:00
..
cmds design.cc: Fix selections when copying 2025-04-08 16:35:12 +12:00
equiv mark all hash_into methods nodiscard 2025-01-14 12:39:15 +01:00
fsm io: refactor string and file work into new unit 2025-03-19 13:43:42 +01:00
hierarchy Reinstate #4768 2025-04-08 11:58:05 +12:00
memory memory_libmap: update indices on design modification 2025-02-11 13:32:34 +01:00
opt Reinstate #4768 2025-04-08 11:58:05 +12:00
pmgen io: refactor string and file work into new unit 2025-03-19 13:43:42 +01:00
proc mark all hash_into methods nodiscard 2025-01-14 12:39:15 +01:00
sat Reinstate #4768 2025-04-08 11:58:05 +12:00
techmap Reinstate #4768 2025-04-08 11:58:05 +12:00
tests macc: Stop using the B port 2025-01-08 13:03:35 +01:00