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	| The `Design::selected_*()` methods no longer unconditionally skip boxed modules.  Instead, selections are now box and design aware.
The selection constructor now optionally takes a design pointer, and has a new `selects_boxes` flag.  If the selection has an assigned design, then `Selection::selected_*()` will only return true for boxed modules if the selects_boxes flag is set.  A warning is raised if a selection is checked and no design is set.  Selections can change design via the `Selection::optimize()` method.
Most places that iterate over `Design::modules()` and check `Selection::selected_module()` should instead use `Design::selected_modules()`.
Since boxed modules should only ever be selected explicitly, and `full_selection` (now) refers to all non-boxed modules, `Selection::optimize()` will clear the `full_selection` flag if the `selects_boxes` flag is enabled, and instead explicitly selects all modules (including boxed modules).  This also means that `full_selection` will only get automatically applied to a design without any boxed modules.
These changes necessitated a number of changes to `select.cc` in order to support this functionality when operating on selections, in particular when combining selections (e.g. by union or difference).
To minimize redundancy, a number of places that previously iterated over `design->modules()` now push the current selection to the design, use `design->selected_modules()`, and then pop the selection when done.
Introduce `RTLIL::NamedObject`, to allow for iterating over all members of a module with a single iterator instead of needing to iterate over wires, cells, memories, and processes separately.
Also implement `Module::selected_{memories, processes, members}()` to match wires and cells methods.  The `selected_members()` method combines each of the other `selected_*()` methods into a single list. | ||
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| .. | ||
| binding.cc | ||
| binding.h | ||
| bitpattern.h | ||
| calc.cc | ||
| cellaigs.cc | ||
| cellaigs.h | ||
| celledges.cc | ||
| celledges.h | ||
| celltypes.h | ||
| compute_graph.h | ||
| consteval.h | ||
| constids.inc | ||
| cost.cc | ||
| cost.h | ||
| driver.cc | ||
| drivertools.cc | ||
| drivertools.h | ||
| ff.cc | ||
| ff.h | ||
| ffinit.h | ||
| ffmerge.cc | ||
| ffmerge.h | ||
| fmt.cc | ||
| fmt.h | ||
| fstdata.cc | ||
| fstdata.h | ||
| functional.cc | ||
| functional.h | ||
| hashlib.h | ||
| json.cc | ||
| json.h | ||
| log.cc | ||
| log.h | ||
| macc.h | ||
| mem.cc | ||
| mem.h | ||
| modtools.h | ||
| qcsat.cc | ||
| qcsat.h | ||
| register.cc | ||
| register.h | ||
| rtlil.cc | ||
| rtlil.h | ||
| satgen.cc | ||
| satgen.h | ||
| scopeinfo.cc | ||
| scopeinfo.h | ||
| sexpr.cc | ||
| sexpr.h | ||
| sigtools.h | ||
| tclapi.cc | ||
| timinginfo.h | ||
| topo_scc.h | ||
| utils.h | ||
| yosys.cc | ||
| yosys.h | ||
| yosys_common.h | ||
| yw.cc | ||
| yw.h | ||