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yosys/tests/fmt/always_full_tb.cc
Charlotte 04582f2fb7 verilog_backend: emit sync $print cells with same triggers together
Sort by PRIORITY, ensuring output order.
2023-08-11 04:46:52 +02:00

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156 B
C++

#include <iostream>
#include "yosys-always_full.cc"
int main()
{
cxxrtl_design::p_always__full uut;
uut.p_clk.set(!uut.p_clk);
uut.step();
return 0;
}