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yosys/backends/verilog
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Charlotte 04582f2fb7 verilog_backend: emit sync $print cells with same triggers together 
Sort by PRIORITY, ensuring output order.
2023-08-11 04:46:52 +02:00
..
Makefile.inc initial import 2013-01-05 11:13:26 +01:00
verilog_backend.cc verilog_backend: emit sync $print cells with same triggers together 2023-08-11 04:46:52 +02:00