mirror of
https://github.com/YosysHQ/yosys
synced 2026-03-23 04:49:15 +00:00
9288889e20
Add simulation models, techmap, and dfflegalize rules for Gowin DL-series latch primitives. Latches use the same physical BEL as DFFs with REGMODE set to LATCH. All 12 variants are supported: DL, DLE, DLN, DLNE, DLC, DLCE, DLNC, DLNCE, DLP, DLPE, DLNP, DLNPE.
16 lines
972 B
Makefile
16 lines
972 B
Makefile
|
|
OBJS += techlibs/gowin/synth_gowin.o
|
|
|
|
$(eval $(call add_share_file,share/gowin,techlibs/gowin/cells_map.v))
|
|
$(eval $(call add_share_file,share/gowin,techlibs/gowin/cells_sim.v))
|
|
$(eval $(call add_share_file,share/gowin,techlibs/gowin/cells_latch.v))
|
|
$(eval $(call add_share_file,share/gowin,techlibs/gowin/cells_xtra_gw1n.v))
|
|
$(eval $(call add_share_file,share/gowin,techlibs/gowin/cells_xtra_gw2a.v))
|
|
$(eval $(call add_share_file,share/gowin,techlibs/gowin/cells_xtra_gw5a.v))
|
|
$(eval $(call add_share_file,share/gowin,techlibs/gowin/arith_map.v))
|
|
$(eval $(call add_share_file,share/gowin,techlibs/gowin/brams_map.v))
|
|
$(eval $(call add_share_file,share/gowin,techlibs/gowin/brams_map_gw5a.v))
|
|
$(eval $(call add_share_file,share/gowin,techlibs/gowin/brams.txt))
|
|
$(eval $(call add_share_file,share/gowin,techlibs/gowin/lutrams_map.v))
|
|
$(eval $(call add_share_file,share/gowin,techlibs/gowin/lutrams.txt))
|
|
$(eval $(call add_share_file,share/gowin,techlibs/gowin/dsp_map.v))
|