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Code Activity
yosys/tests/arch
History
Eddie Hung 01116f0f0a Add tests for these new models
2019-12-12 18:52:48 -08:00
..
anlogic Rename memory tests to lutram, add more xilinx tests 2019-12-12 17:44:37 -08:00
common Rename memory tests to lutram, add more xilinx tests 2019-12-12 17:44:37 -08:00
ecp5 Rename memory tests to lutram, add more xilinx tests 2019-12-12 17:44:37 -08:00
efinix Rename memory tests to lutram, add more xilinx tests 2019-12-12 17:44:37 -08:00
gowin Rename memory tests to lutram, add more xilinx tests 2019-12-12 17:44:37 -08:00
ice40 Rename memory tests to lutram, add more xilinx tests 2019-12-12 17:44:37 -08:00
xilinx Add tests for these new models 2019-12-12 18:52:48 -08:00
run-test.sh Add simcells.v, simlib.v, and some output 2019-06-27 11:13:49 -07:00