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yosys/techlibs/greenpak4
2025-09-16 22:59:08 +00:00
..
cells_blackbox.v
cells_latch.v
cells_map.v
cells_sim.v
cells_sim_ams.v Moved GP_POR out of digital cells b/c it has delays 2017-08-14 10:45:39 -07:00
cells_sim_digital.v Change to use blocking assignments in non-clocked processes. 2025-04-23 17:21:32 +02:00
cells_sim_wip.v Refactoring: moved modules still in cells_sim to cells_sim_wip 2017-09-01 06:44:15 -07:00
gp_dff.lib
greenpak4_dffinv.cc Update techlibs to avoid bits() 2025-09-16 03:17:23 +00:00
Makefile.inc
synth_greenpak4.cc Remove .c_str() from log_cmd_error() and log_file_error() parameters 2025-09-16 22:59:08 +00:00