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Emil J
4b8d42d22c
Merge pull request
#5095
from YosysHQ/emil/one-bit-width
...
rtlil: enable single-bit vector wires
2025-05-23 15:55:45 +02:00
..
Makefile.inc
initial import
2013-01-05 11:13:26 +01:00
verilog_backend.cc
Merge pull request
#5095
from YosysHQ/emil/one-bit-width
2025-05-23 15:55:45 +02:00