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26 lines
378 B
Verilog
26 lines
378 B
Verilog
// Triple AND GATE
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module mod_74x08_3 (
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input A_1,
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input B_1,
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input A_2,
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input B_2,
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input A_3,
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input B_3,
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output Y_1,
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output Y_2,
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output Y_3);
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assign Y_1 = A_1 & B_1;
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assign Y_2 = A_2 & B_2;
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assign Y_3 = A_3 & B_3;
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endmodule
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// OR GATE
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module mod_74x32_1 (
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input A_1,
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input B_1,
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output Y_1);
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assign Y_1 = A_1 | B_1;
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endmodule
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