mirrors/yosys
3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2026-01-17 16:06:27 +00:00
Code Activity
yosys/passes
History
Exact
Emil J. Tywoniak 8cf422a823 proc_dff: fix missing polarity parameters for $dffsr, add another fallback
2026-01-16 23:46:38 +01:00
..
cmds Merge pull request #5564 from rocallahan/pass-fuzz 2026-01-06 20:07:31 +01:00
equiv Merge pull request #5357 from rocallahan/builtin-ff 2025-09-17 11:37:16 +02:00
fsm fsm_detect: add adff detection 2025-11-06 23:29:47 +02:00
hierarchy hierarchy.cc: Tidying 2025-10-15 09:42:47 +13:00
memory Remove .c_str() from parameters to log_debug() 2025-09-23 19:10:33 +12:00
opt Parallelize opt_merge. 2026-01-08 04:21:39 +00:00
pmgen Remove .c_str() from log_cmd_error() and log_file_error() parameters 2025-09-16 22:59:08 +00:00
proc proc_dff: fix missing polarity parameters for $dffsr, add another fallback 2026-01-16 23:46:38 +01:00
sat Revert sim's cycle_width default back to 10, but keep -width option 2025-10-20 14:40:05 +02:00
techmap Merge pull request #5568 from rocallahan/abc-spawn-errno 2025-12-23 08:09:14 +01:00
tests Widen $polarity cell to multiple ports 2026-01-12 13:21:13 +01:00