mirror of
https://github.com/YosysHQ/yosys
synced 2025-04-22 00:26:40 +00:00
2 lines
78 B
Text
2 lines
78 B
Text
read_verilog opt_lut.v
|
|
equiv_opt -map +/ice40/cells_sim.v -assert synth_ice40
|