if (NOT YOSYS_ENABLE_VERIFIC) # Stub interface library. add_library(verific INTERFACE) set(verific_data_files) else() if (NOT YOSYS_VERIFIC_COMPONENTS) get_verific_components(YOSYS_VERIFIC_COMPONENTS) endif() if (NOT YOSYS_VERIFIC_FEATURES) foreach (component ${YOSYS_VERIFIC_COMPONENTS}) if (component MATCHES "^(hier_tree|vhdl|edif|extensions)$") list(APPEND YOSYS_VERIFIC_FEATURES ${component}) elseif (component STREQUAL "verilog") list(APPEND YOSYS_VERIFIC_FEATURES systemverilog) elseif (component STREQUAL "synlib") list(APPEND YOSYS_VERIFIC_FEATURES liberty) endif() endforeach() endif() message(STATUS "Verific library components: ${YOSYS_VERIFIC_COMPONENTS}") message(STATUS "Verific frontend features: ${YOSYS_VERIFIC_FEATURES}") get_verific_options(verific_include_dirs verific_libraries ${YOSYS_VERIFIC_COMPONENTS}) add_library(verific INTERFACE) target_include_directories(verific INTERFACE ${verific_include_dirs} ) target_link_libraries(verific INTERFACE $ PkgConfig::zlib ) set(verific_data_files) if ("vhdl" IN_LIST YOSYS_VERIFIC_FEATURES) foreach (vdb_std 1987 1993 2008 2019) set(vdb_std_root ${YOSYS_VERIFIC_DIR}/vhdl_packages/vdbs_${vdb_std}) file(GLOB_RECURSE vdb_files RELATIVE ${vdb_std_root} ${vdb_std_root}/*) foreach (vdb_file ${vdb_files}) list(APPEND verific_data_files verific/vhdl_vdbs_${vdb_std}/${vdb_file} ${YOSYS_VERIFIC_DIR}/vhdl_packages/vdbs_${vdb_std}/${vdb_file} ) endforeach() endforeach() endif() endif() yosys_frontend(verific verific.cc verific.h $<${YOSYS_ENABLE_VERIFIC}:verificsva.cc> DEFINITIONS $<$:VERIFIC_HIER_TREE_SUPPORT> $<$:VERIFIC_SYSTEMVERILOG_SUPPORT> $<$:VERIFIC_VHDL_SUPPORT> $<$:VERIFIC_EDIF_SUPPORT> $<$:VERIFIC_LIBERTY_SUPPORT> $<$:YOSYSHQ_VERIFIC_EXTENSIONS> LIBRARIES verific REQUIRES sha1 read_verilog PROVIDES read DATA_EXPLICIT ${verific_data_files} )