# Generated by Yosys 0.40+7 (git sha1 cc795a3f5, g++ 13.2.0 -Og -fPIC)
autoidx 5
attribute \cells_not_processed 1
attribute \src "multiple_outputs.v:1.1-15.10"
module \gold
  attribute \src "multiple_outputs.v:11.12-11.20"
  wire $and$multiple_outputs.v:11$2_Y
  attribute \src "multiple_outputs.v:10.12-10.14"
  wire $not$multiple_outputs.v:10$1_Y
  attribute \src "multiple_outputs.v:12.12-12.20"
  wire $or$multiple_outputs.v:12$3_Y
  attribute \src "multiple_outputs.v:13.12-13.20"
  wire $xor$multiple_outputs.v:13$4_Y
  attribute \src "multiple_outputs.v:2.16-2.17"
  wire input 1 \a
  attribute \src "multiple_outputs.v:3.17-3.18"
  wire output 2 \b
  attribute \src "multiple_outputs.v:4.17-4.18"
  wire output 3 \c
  attribute \src "multiple_outputs.v:5.17-5.18"
  wire output 4 \d
  attribute \src "multiple_outputs.v:6.17-6.18"
  wire output 5 \e
  attribute \src "multiple_outputs.v:11.12-11.20"
  cell $and $and$multiple_outputs.v:11$2
    parameter \A_SIGNED 0
    parameter \A_WIDTH 1
    parameter \B_SIGNED 0
    parameter \B_WIDTH 1
    parameter \Y_WIDTH 1
    connect \A \a
    connect \B 1'1
    connect \Y $and$multiple_outputs.v:11$2_Y
  end
  attribute \src "multiple_outputs.v:10.12-10.14"
  cell $not $not$multiple_outputs.v:10$1
    parameter \A_SIGNED 0
    parameter \A_WIDTH 1
    parameter \Y_WIDTH 1
    connect \A \a
    connect \Y $not$multiple_outputs.v:10$1_Y
  end
  attribute \src "multiple_outputs.v:12.12-12.20"
  cell $or $or$multiple_outputs.v:12$3
    parameter \A_SIGNED 0
    parameter \A_WIDTH 1
    parameter \B_SIGNED 0
    parameter \B_WIDTH 1
    parameter \Y_WIDTH 1
    connect \A \a
    connect \B 1'0
    connect \Y $or$multiple_outputs.v:12$3_Y
  end
  attribute \src "multiple_outputs.v:13.12-13.20"
  cell $xor $xor$multiple_outputs.v:13$4
    parameter \A_SIGNED 0
    parameter \A_WIDTH 1
    parameter \B_SIGNED 0
    parameter \B_WIDTH 1
    parameter \Y_WIDTH 1
    connect \A \a
    connect \B 1'1
    connect \Y $xor$multiple_outputs.v:13$4_Y
  end
  connect \b $not$multiple_outputs.v:10$1_Y
  connect \c $and$multiple_outputs.v:11$2_Y
  connect \d $or$multiple_outputs.v:12$3_Y
  connect \e $xor$multiple_outputs.v:13$4_Y
end