# Simple Dual Port # Supported: # SDP_4096x05 # SDP_2048x10 # SDP_1024x40 # Ignored: # SDP_2048x09 ram block $__ANALOGDEVICES_BLOCKRAM_SDP_ { option "ENABLE_WIDTH" "BIT" { abits 12; widths 5 10 global; byte 1; cost 1; } option "ENABLE_WIDTH" "BYTE" { abits 10; width 40; byte 8; cost 4; } # Unclear if/how RBRAM is initialized, default SIM_INIT_BEHAVIOUR is UNINITIALIZED init none; port sr "R" { clock anyedge; clken; } port sw "W" { clock anyedge; clken; } } # Single Port # SP_1024x20 # Dual Single Port # SP2_1024x09 # SP2_2048x05