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aiju/docs_gvpack_fix

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e1743b3bac Added "test_cell -script" Clifford Wolf 2014-09-06 11:46:07 +02:00
652345c9cd Merge pull request #38 from rubund/master Clifford Wolf 2014-09-06 10:15:47 +02:00
79cbf9067c Corrected spelling mistakes found by lintian Ruben Undheim 2014-09-06 08:47:06 +02:00
01ef34c147 Added tests/various/constmsk_test.ys Clifford Wolf 2014-09-04 15:07:30 +02:00
f5a40e7043 Fixed "opt_const -fine" for $pos cells Clifford Wolf 2014-09-04 08:55:58 +02:00
8927aa6148 Removed $bu0 cell type Clifford Wolf 2014-09-04 02:07:52 +02:00
b9cb483f3e Using $pos models for $bu0 Clifford Wolf 2014-09-03 21:20:59 +02:00
5733f4a39d Fixed "test_cells -vlog" Clifford Wolf 2014-09-03 13:43:37 +02:00
50ac284823 Fixes in $alu SAT- and eval-models Clifford Wolf 2014-09-03 13:39:46 +02:00
635b922afe Undef-related fixes in simlib $alu model Clifford Wolf 2014-09-02 23:21:59 +02:00
f1869667ca Improvements in "test_cell -vlog" Clifford Wolf 2014-09-02 23:21:15 +02:00
66bf2bb92e Added test_cell -vlog Clifford Wolf 2014-09-02 22:49:43 +02:00
da360771a1 Create a default selection stack in RTLIL::Design::Design() Clifford Wolf 2014-09-02 22:49:24 +02:00
c38283dbd0 Small bug fixes in $not, $neg, and $shiftx models Clifford Wolf 2014-09-02 17:48:41 +02:00
acd7a99aef Added SAT testing to test_cell eval stage Clifford Wolf 2014-09-02 17:28:13 +02:00
2446b6fbef added $pmux cell translation Ahmed Irfan 2014-09-02 14:47:51 +02:00
37fe7c7bdf Removed references to yosys-svgviewer from docs Clifford Wolf 2014-09-02 04:03:06 +02:00
ee29ae2206 Removed yosys-svgviewer Clifford Wolf 2014-09-02 03:52:46 +02:00
9f00a0cd2d Using "xdot" instead of "yosys-svgviewer" in show command Clifford Wolf 2014-09-02 03:28:46 +02:00
630befdf6d Added $alu support to test_cell Clifford Wolf 2014-09-01 16:36:04 +02:00
2fcf66b91d Added ConstEval model for $alu cells Clifford Wolf 2014-09-01 16:35:46 +02:00
bae09dca2b Added SAT model for $alu cells Clifford Wolf 2014-09-01 16:35:25 +02:00
9923762461 Fixed "test_cell -simlib all" Clifford Wolf 2014-09-01 15:37:56 +02:00
c7f81e4e49 Added "test_cell -simlib -v" Clifford Wolf 2014-09-01 15:37:21 +02:00
826fdb34d8 Added "techmap -autoproc" Clifford Wolf 2014-09-01 15:36:29 +02:00
27a1bfbec6 Fixes in old SAT example.ys Clifford Wolf 2014-09-01 11:45:47 +02:00
d5148f2e01 Moved "share" and "wreduce" to passes/opt/ Clifford Wolf 2014-09-01 11:45:26 +02:00
e07698818d Using std::vector<RTLIL::State> instead of RTLIL::Const for RTLIL::SigChunk::data Clifford Wolf 2014-09-01 11:36:02 +02:00
e3664066d5 Added eval testing to test_cell Clifford Wolf 2014-08-31 18:08:42 +02:00
83ec3fa204 Fixed return size of const_*() eval functions Clifford Wolf 2014-08-31 18:08:26 +02:00
be44157c0f Added RTLIL::Const::size() Clifford Wolf 2014-08-31 18:07:48 +02:00
a1c7d4a8e2 Added eval model for $lut cells Clifford Wolf 2014-08-31 17:42:38 +02:00
0b6769af3f Typo fixes in cell->*Param() API Clifford Wolf 2014-08-31 17:07:07 +02:00
8649b57b6f Added $lut support in test_cell, techmap, satgen Clifford Wolf 2014-08-31 17:06:36 +02:00
2a1b08aeb3 Added design->scratchpad Clifford Wolf 2014-08-30 19:37:12 +02:00
4724d94fbc Added $alu cell type Clifford Wolf 2014-08-30 18:59:05 +02:00
88db09255b Added autotest -e (do not use -noexpr on write_verilog) Clifford Wolf 2014-08-30 18:34:07 +02:00
6ff46323a3 Improved write address decoder generation memory_map Clifford Wolf 2014-08-30 18:18:15 +02:00
dfbd7dd15a Fixed module->addPmux() Clifford Wolf 2014-08-30 18:17:22 +02:00
66763fad4e Using worker class in memory_map Clifford Wolf 2014-08-30 17:39:08 +02:00
eb571cba6a Replaced $__alu CO/CS outputs with full-width CO output Clifford Wolf 2014-08-30 15:12:39 +02:00
3a7d5d188d Don't change existing binary FSM encoding if it is already optimal Clifford Wolf 2014-08-30 14:43:06 +02:00
f910481f35 Using $pmux info in fsm_extract to optimize transition ctrl_in patterns Clifford Wolf 2014-08-30 14:34:49 +02:00
ab019b0bd5 Improved handling of $pmux cells in fsm_extract Clifford Wolf 2014-08-30 14:11:57 +02:00
d148b0af0d Fixed inserting of Q-inverters in dfflibmap Clifford Wolf 2014-08-27 19:44:12 +02:00
cfb4338319 Fixed printing of multi-line Makefile.conf Clifford Wolf 2014-08-27 12:13:53 +02:00
084685f480 Implemented "rename -enumerate -pattern" Clifford Wolf 2014-08-26 12:51:08 +02:00
e70480655e Print Makefile.conf as make info message Clifford Wolf 2014-08-26 10:11:46 +02:00
672b2c6db1 Checking for valid CONFIG value in Makefile Clifford Wolf 2014-08-25 12:48:20 +02:00
7bbbe3580d Optimize shift ops with constant rhs in opt_const Clifford Wolf 2014-08-24 17:08:07 +02:00
641501203c Added some additional log messages to opt_const Clifford Wolf 2014-08-24 15:14:45 +02:00
eda603105e Added is_signed argument to SigSpec.as_int() and Const.as_int() Clifford Wolf 2014-08-24 15:14:00 +02:00
9c5a63c52c azonenberg: Make dump_vcd save model when temporal induction fails due to step limit Clifford Wolf 2014-08-24 13:27:40 +02:00
c642dd0b3e Only call proc_share_dirname() in techmap when necessary Clifford Wolf 2014-08-23 15:32:00 +02:00
58367cd87a Removed compatbility.{h,cc}: Not using open_memstream/fmemopen anymore Clifford Wolf 2014-08-23 15:14:58 +02:00
19cff41eb4 Changed frontend-api from FILE to std::istream Clifford Wolf 2014-08-23 15:03:55 +02:00
5dce303a2a Changed backend-api from FILE to std::ostream Clifford Wolf 2014-08-23 13:54:21 +02:00
fff12c719f Added "stat -width" Clifford Wolf 2014-08-22 17:20:28 +02:00
98442e019d Added emscripten (emcc) support to build system and some build fixes Clifford Wolf 2014-08-22 16:09:13 +02:00
ba83a7bdc6 Added DPI-C documentation to README file Clifford Wolf 2014-08-22 14:37:14 +02:00
e218f0eacf Added support for non-standard <plugin>:<c_name> DPI syntax Clifford Wolf 2014-08-22 14:30:29 +02:00
74af3a2b70 Archibald Rust and Clifford Wolf: ffi-based dpi_call() Clifford Wolf 2014-08-22 14:22:09 +02:00
a3494fa9ed Added "plugin" command Clifford Wolf 2014-08-22 13:58:36 +02:00
752650a062 Updated ABC to 4d547a5e065b Clifford Wolf 2014-08-22 12:20:23 +02:00
c2df5b9175 Cosmetic changes to FSM tests Clifford Wolf 2014-08-21 17:40:49 +02:00
ad146c2582 Fixed small memory leak in ast simplify Clifford Wolf 2014-08-21 17:33:40 +02:00
6c5cafcd8b Added support for DPI function with different names in C and Verilog Clifford Wolf 2014-08-21 17:22:04 +02:00
085c8e873d Added AstNode::asInt() Clifford Wolf 2014-08-21 17:11:51 +02:00
490d7a5bf2 Fixed memory leak in DPI function calls Clifford Wolf 2014-08-21 13:09:47 +02:00
4f35a81ad9 Merge branch 'master' of github.com:cliffordwolf/yosys Clifford Wolf 2014-08-21 12:58:16 +02:00
7bfc4ae120 Added Verilog/AST support for DPI functions (dpi_call() still unimplemented) Clifford Wolf 2014-08-21 12:43:51 +02:00
38addd4c67 Added support for global tasks and functions Clifford Wolf 2014-08-21 12:42:28 +02:00
b37d70dfd7 Added mod->addGate() methods for new gate types Clifford Wolf 2014-08-19 13:44:56 +02:00
a92a68ce52 Using "via_celltype" in $mul carry-save-acc implementation Clifford Wolf 2014-08-18 14:30:20 +02:00
640d9fc551 Added "via_celltype" attribute on task/func Clifford Wolf 2014-08-18 14:29:30 +02:00
6f33fc3e87 Performance fix for new $__lcu techmap rule Clifford Wolf 2014-08-18 00:27:54 +02:00
4b3834e0cc Replaced recursive lcu scheme with bk adder Clifford Wolf 2014-08-18 00:03:33 +02:00
acb435b6cf Added const folding of AST_CASE to AST simplifier Clifford Wolf 2014-08-18 00:02:30 +02:00
aa7a3ed83f Fixed proc_{self,share}_dirname error handling Clifford Wolf 2014-08-17 02:25:59 +02:00
aa3a6663e2 Makefile fixes Clifford Wolf 2014-08-17 02:24:53 +02:00
64713647a9 Improved AST ProcessGenerator performance Clifford Wolf 2014-08-17 02:17:49 +02:00
f3326a6421 Improved sig.remove2() performance Clifford Wolf 2014-08-17 02:16:56 +02:00
d491fd8c19 Use stackmap<> in AST ProcessGenerator Clifford Wolf 2014-08-17 00:57:24 +02:00
9bacc0b54c Added stackmap<> container Clifford Wolf 2014-08-17 00:56:47 +02:00
410d043dd8 Renamed toposort.h to utils.h Clifford Wolf 2014-08-17 00:55:35 +02:00
7f734ecc09 Added module->uniquify() Clifford Wolf 2014-08-16 23:50:36 +02:00
f82c978e08 Fixed AOI/OAI expr handling in verilog backend Clifford Wolf 2014-08-16 22:05:09 +02:00
976bda7102 Multiply using a carry-save accumulator Clifford Wolf 2014-08-16 21:07:29 +02:00
3b9157f9a6 Added "test_cell -s <seed>" Clifford Wolf 2014-08-16 19:44:31 +02:00
83e2698e10 AST ProcessGenerator: replaced subst_*_{from,to} with subst_*_map Clifford Wolf 2014-08-16 19:31:59 +02:00
47c2637a96 Added additional gate types: $_NAND_ $_NOR_ $_XNOR_ $_AOI3_ $_OAI3_ $_AOI4_ $_OAI4_ Clifford Wolf 2014-08-16 18:18:30 +02:00
56a30cf42c Added CellTypes::cell_evaluable() Clifford Wolf 2014-08-16 16:12:14 +02:00
1ddf150c35 Changes in techmap $__alu interface Clifford Wolf 2014-08-16 16:01:58 +02:00
eb17fbade5 Added "opt -fast" Clifford Wolf 2014-08-16 15:34:15 +02:00
dbdf89c705 Added log_spacer() Clifford Wolf 2014-08-16 15:34:00 +02:00
674f421b47 Bugfix in iopadmap Clifford Wolf 2014-08-15 14:29:42 +02:00
b64b38eea2 Renamed $lut ports to follow A-Y naming scheme Clifford Wolf 2014-08-15 14:18:40 +02:00
f092b50148 Renamed $_INV_ cell type to $_NOT_ Clifford Wolf 2014-08-15 14:11:40 +02:00
bf486002d9 Removed old doc references to $safe_pmux Clifford Wolf 2014-08-15 14:04:35 +02:00
ca87116449 More idstring sort_by_* helpers and fixed tpl ordering in techmap Clifford Wolf 2014-08-15 02:40:46 +02:00