384 commits

Author	SHA1	Message	Date
Eddie Hung	1d875ac76a	No need for $__mul anymore?	2019-09-25 14:06:21 -07:00
Eddie Hung	ab46d9017b	Fix signedness bug	2019-09-20 10:11:36 -07:00
Eddie Hung	f2d030a70f	Be sensitive to signedness	2019-09-10 15:14:55 -07:00
Eddie Hung	76eedee089	Really get rid of 'opt_expr -fine' by being explicit	2019-09-10 14:26:12 -07:00
Eddie Hung	e742478e1d	Merge remote-tracking branch 'origin/master' into xc7dsp	2019-09-05 13:01:27 -07:00
Eddie Hung	295c18bd6b	Merge branch 'xc7dsp' of github.com:YosysHQ/yosys into xc7dsp	2019-08-30 09:50:20 -07:00
David Shah	6919c0f9b0	Merge branch 'master' into xc7dsp	2019-08-30 13:57:15 +01:00
Eddie Hung	c4e5310823	Use a dummy box file if none specified	2019-08-28 20:58:55 -07:00
Eddie Hung	076af2e617	Missing newline	2019-08-20 20:37:52 -07:00
Eddie Hung	e35dfc5ab5	Only swap ports if $mul and not $__mul	2019-08-13 16:52:15 -07:00
Eddie Hung	2a1b98d478	Add DSP_A_MAXWIDTH_PARTIAL, refactor	2019-08-13 10:21:24 -07:00
Eddie Hung	f890cfb63b	Merge remote-tracking branch 'origin/master' into xc7dsp	2019-08-12 11:32:10 -07:00
Eddie Hung	041defc5a6	Reformat so it shows up/looks nice when "help $alu" and "help $alu+"	2019-08-09 12:33:39 -07:00
Eddie Hung	acfb672d34	A bit more on where $lcu comes from	2019-08-09 09:50:47 -07:00
Eddie Hung	5aef998957	Add more comments	2019-08-09 09:48:17 -07:00
Eddie Hung	dae7c59358	Add a few comments to document $alu and $lcu	2019-08-08 10:05:28 -07:00
Eddie Hung	e3d898dccb	Merge remote-tracking branch 'origin/master' into xc7dsp	2019-08-07 13:44:08 -07:00
Clifford Wolf	023086bd46	Add $_NMUX_, add "abc -g cmos", add proper cmos cell costs ... Signed-off-by: Clifford Wolf <clifford@clifford.at>	2019-08-06 04:47:55 +02:00
Eddie Hung	105aaeaf59	Trim Y_WIDTH	2019-08-01 14:33:16 -07:00
Eddie Hung	65de9aaaa9	Add DSP_SIGNEDONLY back	2019-08-01 14:29:00 -07:00
Eddie Hung	915f4e34bf	DSP_MINWIDTH -> DSP_{A,B,Y}_MINWIDTH	2019-08-01 13:20:34 -07:00
Eddie Hung	332b86491d	Revert "Do not do sign extension in techmap; let packer do it" ... This reverts commit 595a8f032f.	2019-08-01 12:17:14 -07:00
Eddie Hung	7e86c8bcfb	Fix B_WIDTH > DSP_B_MAXWIDTH case	2019-08-01 10:01:43 -07:00
Eddie Hung	d2c33863d0	Do not compute sign bit if result is zero	2019-07-31 16:04:19 -07:00
Eddie Hung	60c4887d15	For signed multipliers, compute sign bit separately...	2019-07-31 15:45:41 -07:00
Eddie Hung	2f71c2c219	Fix spacing	2019-07-26 15:30:51 -07:00
Eddie Hung	c39ccc65e9	Add copyright header, comment on cascade	2019-07-24 10:49:09 -07:00
Eddie Hung	151c5c96c0	Typo for Y_WIDTH	2019-07-23 15:05:20 -07:00
Eddie Hung	3a7aeb028d	Use minimum sized width wires	2019-07-22 13:01:26 -07:00
Eddie Hung	47fd042b9f	Indirection via $__soft_mul	2019-07-19 20:20:33 -07:00
Eddie Hung	595a8f032f	Do not do sign extension in techmap; let packer do it	2019-07-19 15:50:13 -07:00
Eddie Hung	bba72f03dd	Do not $mul -> $__mul if A and B are less than maxwidth	2019-07-19 11:54:26 -07:00
Eddie Hung	1d14cec7fd	Add a DSP_MINWIDTH macro, and soft-logic for {A_WIDTH,B_WIDTH} <= 1 too	2019-07-19 11:39:24 -07:00
Eddie Hung	7bdb3996e2	Merge branch 'xc7dsp' into ice40dsp	2019-07-19 10:28:38 -07:00
Eddie Hung	ca94c2d3c4	Fix typo in B	2019-07-19 10:27:44 -07:00
Eddie Hung	2168568f43	Use sign_headroom instead	2019-07-19 09:16:13 -07:00
Eddie Hung	0157043b97	Merge remote-tracking branch 'origin/master' into xc7dsp	2019-07-18 20:36:48 -07:00
Eddie Hung	15c2a79ab9	Do not define `DSP_SIGNEDONLY macro if no exists	2019-07-18 16:04:58 -07:00
Eddie Hung	42e40dbd0a	Merge remote-tracking branch 'origin/master' into ice40dsp	2019-07-18 15:45:25 -07:00
Eddie Hung	2339b7fc37	mul2dsp to create cells that can be interchanged with $mul	2019-07-18 15:37:35 -07:00
Eddie Hung	e22a752242	Make consistent	2019-07-18 15:21:23 -07:00
Eddie Hung	8326af5418	Fix signed multiplier decomposition	2019-07-18 13:11:26 -07:00
Eddie Hung	2024357f32	Working for unsigned	2019-07-18 10:53:18 -07:00
Eddie Hung	d5cd2c80be	Cleanup	2019-07-18 09:20:48 -07:00
David Shah	16b0ccf04c	mul2dsp: Lower partial products always have unsigned inputs ... Signed-off-by: David Shah <dave@ds0.me>	2019-07-18 11:33:37 +01:00
Eddie Hung	8dca8d486e	Fix mul2dsp signedness	2019-07-17 12:44:52 -07:00
Eddie Hung	1b62b82e05	A_SIGNED == B_SIGNED so flip both	2019-07-17 11:34:18 -07:00
Eddie Hung	0b6d47f8bf	Add DSP_{A,B}_SIGNEDONLY macro	2019-07-16 15:55:13 -07:00
Eddie Hung	569cd66764	Merge branch 'xc7dsp' of github.com:YosysHQ/yosys into xc7dsp	2019-07-16 14:18:36 -07:00
Eddie Hung	7a58ee78dc	gen_lut to return correctly sized LUT mask	2019-07-16 12:45:29 -07:00