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Replace use of SigSpec::operator[] const in sigtools with iterators
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parent
8875efcebd
commit
ff86130cf9
2 changed files with 21 additions and 8 deletions
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@ -1236,6 +1236,16 @@ struct RTLIL::SigSpecConstIterator
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inline bool operator==(const RTLIL::SigSpecConstIterator &other) const { return bit_index == other.bit_index; }
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inline bool operator==(const RTLIL::SigSpecConstIterator &other) const { return bit_index == other.bit_index; }
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inline RTLIL::SigSpecConstIterator &operator++();
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inline RTLIL::SigSpecConstIterator &operator++();
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inline RTLIL::SigSpecConstIterator &operator--();
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inline RTLIL::SigSpecConstIterator &operator--();
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inline RTLIL::SigSpecConstIterator operator++(int) {
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RTLIL::SigSpecConstIterator result(*this);
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++(*this);
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return result;
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}
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inline RTLIL::SigSpecConstIterator operator--(int) {
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RTLIL::SigSpecConstIterator result(*this);
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--(*this);
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return result;
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}
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private:
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private:
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// Must be called when sig_p is packed and `bit_index` is in range. Finds the chunk containing `bit_index`
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// Must be called when sig_p is packed and `bit_index` is in range. Finds the chunk containing `bit_index`
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@ -72,8 +72,9 @@ struct SigPool
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void expand(const RTLIL::SigSpec &from, const RTLIL::SigSpec &to)
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void expand(const RTLIL::SigSpec &from, const RTLIL::SigSpec &to)
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{
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{
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log_assert(GetSize(from) == GetSize(to));
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log_assert(GetSize(from) == GetSize(to));
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for (int i = 0; i < GetSize(from); i++) {
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RTLIL::SigSpecConstIterator to_it = to.begin();
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bitDef_t bit_from(from[i]), bit_to(to[i]);
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for (auto &bit : from) {
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bitDef_t bit_from(bit), bit_to(*to_it++);
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if (bit_from.first != NULL && bit_to.first != NULL && bits.count(bit_from) > 0)
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if (bit_from.first != NULL && bit_to.first != NULL && bits.count(bit_from) > 0)
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bits.insert(bit_to);
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bits.insert(bit_to);
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}
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}
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@ -321,10 +322,11 @@ struct SigMap final : public SigMapView
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{
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{
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log_assert(GetSize(from) == GetSize(to));
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log_assert(GetSize(from) == GetSize(to));
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for (int i = 0; i < GetSize(from); i++)
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RTLIL::SigSpecConstIterator to_it = to.begin();
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for (auto &bit : from)
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{
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{
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int bfi = database.lookup(from[i]);
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int bfi = database.lookup(bit);
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int bti = database.lookup(to[i]);
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int bti = database.lookup(*to_it++);
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const RTLIL::SigBit &bf = database[bfi];
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const RTLIL::SigBit &bf = database[bfi];
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const RTLIL::SigBit &bt = database[bti];
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const RTLIL::SigBit &bt = database[bti];
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@ -415,10 +417,11 @@ struct SigValMap final : public SigMapView
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{
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{
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log_assert(GetSize(from) == GetSize(to));
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log_assert(GetSize(from) == GetSize(to));
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for (int i = 0; i < GetSize(from); i++)
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RTLIL::SigSpecConstIterator to_it = to.begin();
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for (auto &bit : from)
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{
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{
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int bfi = database.lookup(from[i]);
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int bfi = database.lookup(bit);
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int bti = database.lookup(to[i]);
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int bti = database.lookup(*to_it++);
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if (bfi == bti) {
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if (bfi == bti) {
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continue;
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continue;
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}
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}
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