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Merge remote-tracking branch 'origin/xaig_dff' into eddie/xaig_dff_adff
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commit
fe36275234
7 changed files with 22 additions and 13 deletions
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@ -268,13 +268,18 @@ assign o = { 1'b1, 1'bx };
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assign p = { 1'b1, 1'bx, 1'b0 };
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endmodule
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module abc9_test029(input clk, d, r, output reg q);
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module abc9_test029(input clk1, clk2, input d, output reg q1, q2);
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always @(posedge clk1) q1 <= d;
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always @(negedge clk2) q2 <= q1;
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endmodule
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module abc9_test030(input clk, d, r, output reg q);
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always @(posedge clk or posedge r)
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if (r) q <= 1'b0;
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else q <= d;
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endmodule
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module abc9_test030(input clk, d, r, output reg q);
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module abc9_test031(input clk, d, r, output reg q);
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always @(negedge clk or posedge r)
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if (r) q <= 1'b1;
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else q <= d;
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@ -10,7 +10,7 @@ unknown u(~i, w);
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unknown2 u2(w, o);
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endmodule
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module abc9_test031(input clk, d, r, output reg q);
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module abc9_test032(input clk, d, r, output reg q);
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initial q = 1'b0;
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always @(negedge clk or negedge r)
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if (r) q <= 1'b0;
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@ -24,7 +24,7 @@ select -assert-count 1 t:unknown
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select -assert-none t:$lut t:unknown %% t: %D
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design -load read
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hierarchy -top abc9_test031
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hierarchy -top abc9_test032
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proc
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clk2fflogic
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design -save gold
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