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Merge remote-tracking branch 'origin/xaig_dff' into eddie/xaig_dff_adff

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Eddie Hung 2019-11-21 16:32:52 -08:00
commit fe36275234
7 changed files with 22 additions and 13 deletions
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8
techlibs/xilinx/abc9_map.v
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@ -96,7 +96,7 @@ module FDRE_1 (output reg Q, input C, CE, D, R);
parameter [0:0] INIT = 1'b0;
wire $nextQ;
FDRE_1 #(
.INIT(|0),
.INIT(INIT),
) _TECHMAP_REPLACE_ (
.D(D), .Q($nextQ), .C(C), .CE(CE), .R(R)
);
@ -209,7 +209,7 @@ module FDPE_1 (output reg Q, input C, CE, D, PRE);
endmodule
module FDSE (output reg Q, input C, CE, D, S);
parameter [0:0] INIT = 1'b0;
parameter [0:0] INIT = 1'b1;
parameter [0:0] IS_C_INVERTED = 1'b0;
parameter [0:0] IS_D_INVERTED = 1'b0;
parameter [0:0] IS_S_INVERTED = 1'b0;
@ -230,10 +230,10 @@ module FDSE (output reg Q, input C, CE, D, S);
wire _TECHMAP_REPLACE_.$abc9_currQ = Q;
endmodule
module FDSE_1 (output reg Q, input C, CE, D, S);
parameter [0:0] INIT = 1'b0;
parameter [0:0] INIT = 1'b1;
wire $nextQ;
FDSE_1 #(
.INIT(|0),
.INIT(INIT),
) _TECHMAP_REPLACE_ (
.D(D), .Q($nextQ), .C(C), .CE(CE), .S(S)
);

3
techlibs/xilinx/abc9_model.v
View file

@ -30,6 +30,9 @@ module \$__XILINX_MUXF78 (output O, input I0, I1, I2, I3, S0, S1);
: (S0 ? I1 : I0);
endmodule
module \$__ABC9_FF_ (input D, output Q);
endmodule
(* abc_box_id = 1000 *)
module \$__ABC9_ASYNC (input A, S, output Y);
endmodule