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kernel: use more ID::*
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parent
164dd0f6b2
commit
fdafb74eb7
69 changed files with 843 additions and 841 deletions
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@ -69,10 +69,10 @@ static void handle_iobufs(Module *module, bool clkbuf_mode)
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buf_port = "\\D";
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} else if (clkbuf_mode && clk_bits.count(canonical_bit)) {
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buf_type = "\\CLKBUF";
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buf_port = "\\Y";
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buf_port = ID::Y;
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} else {
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buf_type = "\\INBUF";
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buf_port = "\\Y";
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buf_port = ID::Y;
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}
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Cell *c = module->addCell(NEW_ID, buf_type);
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@ -114,7 +114,7 @@ static void handle_clkint(Module *module)
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}
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if (cell->type.in("\\CLKBUF", "\\CLKBIBUF", "\\CLKBUF_DIFF", "\\GCLKBUF", "\\GCLKBUF_DIFF", "\\GCLKBIBUF",
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"\\CLKINT", "\\CLKINT_PRESERVE", "\\GCLKINT", "\\RCLKINT", "\\RGCLKINT")) {
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for (auto bit : sigmap(cell->getPort("\\Y")))
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for (auto bit : sigmap(cell->getPort(ID::Y)))
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handled_clk_bits.push_back(bit);
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}
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}
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@ -136,8 +136,8 @@ static void handle_clkint(Module *module)
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if (clk_bits.count(canonical_bit)) {
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Cell *c = module->addCell(NEW_ID, "\\CLKINT");
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SigBit new_bit = module->addWire(NEW_ID);
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c->setPort("\\A", new_bit);
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c->setPort("\\Y", bit);
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c->setPort(ID::A, new_bit);
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c->setPort(ID::Y, bit);
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log("Added %s cell %s for clock signal %s.\n", log_id(c->type), log_id(c), log_signal(bit));
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clk_bits.erase(canonical_bit);
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did_something = true;
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