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Fix handling of ce_over_srst
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parent
13a5c28459
commit
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@ -487,14 +487,13 @@ struct SimInstance
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if (ff_data.pol_clk ? (ff.past_clk == State::S0 && current_clk != State::S0) :
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if (ff_data.pol_clk ? (ff.past_clk == State::S0 && current_clk != State::S0) :
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(ff.past_clk == State::S1 && current_clk != State::S1)) {
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(ff.past_clk == State::S1 && current_clk != State::S1)) {
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bool ce = ff.past_ce == (ff_data.pol_ce ? State::S1 : State::S0);
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bool ce = ff.past_ce == (ff_data.pol_ce ? State::S1 : State::S0);
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// chip enable priority over reset
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if (ff_data.ce_over_srst && ff_data.has_ce && !ce) continue;
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// set if no ce, or ce is enabled
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// set if no ce, or ce is enabled
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if (!ff_data.has_ce || (ff_data.has_ce && ce)) {
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if (!ff_data.has_ce || (ff_data.has_ce && ce)) {
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current_q = ff.past_d;
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current_q = ff.past_d;
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}
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}
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// override if sync reset
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// override if sync reset
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if ((ff_data.has_srst) && (ff.past_srst == (ff_data.pol_srst ? State::S1 : State::S0))) {
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if ((ff_data.has_srst) && (ff.past_srst == (ff_data.pol_srst ? State::S1 : State::S0)) &&
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((!ff_data.ce_over_srst) || (ff_data.ce_over_srst && ce))) {
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current_q = ff_data.val_srst;
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current_q = ff_data.val_srst;
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}
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}
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}
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}
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