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fix indentation across files

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This commit is contained in:
Stefan Biereigel 2019-05-23 13:42:30 +02:00
parent 075a48d3fa
commit fd003e0e97
4 changed files with 80 additions and 60 deletions
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4
frontends/verilog/verilog_parser.y
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@ -486,10 +486,10 @@ wire_type_token:
TOK_WIRE {
} |
TOK_WOR {
astbuf3->is_wor = true;
astbuf3->is_wor = true;
} |
TOK_WAND {
astbuf3->is_wand = true;
astbuf3->is_wand = true;
} |
TOK_REG {
astbuf3->is_reg = true;