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quicklogic: allow fractured mode on canonical dspv1 modules

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Emil J. Tywoniak 2025-03-06 12:55:26 +01:00 • committed by Martin Povišer
parent 62885f1de3
commit fcdd013c57
2 changed files with 6 additions and 4 deletions
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5
techlibs/quicklogic/qlf_k6n10f/dspv1_sim.v
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@ -4195,7 +4195,8 @@ module dsp_t1_20x18x64_cfg_ports (
input wire [ 5:0] shift_right_i,
input wire round_i,
input wire subtract_i,
input wire register_inputs_i
input wire register_inputs_i,
input wire f_mode_i
);
parameter [19:0] COEFF_0 = 20'd0;
@ -4211,7 +4212,7 @@ module dsp_t1_20x18x64_cfg_ports (
.z(z_o),
.dly_b(dly_b_o),
.f_mode(1'b0), // 20x18x64 DSP
.f_mode(f_mode_i), // 20x18x64 DSP
.acc_fir(acc_fir_i),
.feedback(feedback_i),