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https://github.com/YosysHQ/yosys
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cellhelp.py: Unify manual signature handling
Both files strip it, but previously the exact check differed. It is also now safer, checking the length before trying to access elements by index.
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bb8ef02e85
commit
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1 changed files with 8 additions and 11 deletions
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@ -38,9 +38,6 @@ class SimHelper:
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return val
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return val
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def simcells_reparse(cell: SimHelper):
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def simcells_reparse(cell: SimHelper):
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# cut manual signature
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cell.desc = cell.desc[3:]
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# code-block truth table
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# code-block truth table
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new_desc = []
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new_desc = []
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indent = ""
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indent = ""
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@ -58,6 +55,7 @@ def simcells_reparse(cell: SimHelper):
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simHelper = SimHelper()
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simHelper = SimHelper()
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for line in fileinput.input():
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for line in fileinput.input():
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short_filename = Path(fileinput.filename()).name
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line = line.rstrip()
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line = line.rstrip()
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# special comments
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# special comments
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if line.startswith("//-"):
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if line.startswith("//-"):
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@ -71,7 +69,6 @@ for line in fileinput.input():
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clean_line = line[7:].replace("\\", "").replace(";", "")
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clean_line = line[7:].replace("\\", "").replace(";", "")
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simHelper.name, simHelper.ports = clean_line.split(maxsplit=1)
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simHelper.name, simHelper.ports = clean_line.split(maxsplit=1)
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simHelper.code = []
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simHelper.code = []
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short_filename = Path(fileinput.filename()).name
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simHelper.source = f'{short_filename}:{fileinput.filelineno()}'
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simHelper.source = f'{short_filename}:{fileinput.filelineno()}'
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elif not line.startswith("endmodule"):
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elif not line.startswith("endmodule"):
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line = " " + line
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line = " " + line
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@ -81,14 +78,14 @@ for line in fileinput.input():
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# no module definition, ignore line
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# no module definition, ignore line
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pass
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pass
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if line.startswith("endmodule"):
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if line.startswith("endmodule"):
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short_filename = Path(fileinput.filename()).name
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if simHelper.ver == "1":
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if simHelper.ver == "1" and short_filename == "simcells.v":
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# cut manual signature
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# default simcells parsing
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if len(simHelper.desc) > 3 and simHelper.desc[0] == "" and simHelper.desc[2] == "" and simHelper.desc[1].startswith(" "):
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simcells_reparse(simHelper)
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simHelper.desc = simHelper.desc[3:]
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# check help
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# default simcells parsing
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if simHelper.desc and simHelper.ver == "1" and short_filename == "simlib.v" and simHelper.desc[1].startswith(' '):
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if short_filename == "simcells.v":
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simHelper.desc.pop(1)
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simcells_reparse(simHelper)
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# check group
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# check group
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assert simHelper.group, f"techlibs/common/{simHelper.source}: {simHelper.name} cell missing group"
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assert simHelper.group, f"techlibs/common/{simHelper.source}: {simHelper.name} cell missing group"
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