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Fixed handling of power operator
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parent
d7cb62ac96
commit
fc6dc0d7b8
4 changed files with 79 additions and 20 deletions
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@ -1017,9 +1017,10 @@ skip_dynamic_range_lvalue_expansion:;
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if (0) { case AST_SHIFT_RIGHT: const_func = RTLIL::const_shr; }
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if (0) { case AST_SHIFT_SLEFT: const_func = RTLIL::const_sshl; }
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if (0) { case AST_SHIFT_SRIGHT: const_func = RTLIL::const_sshr; }
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if (0) { case AST_POW: const_func = RTLIL::const_pow; }
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if (children[0]->type == AST_CONSTANT && children[1]->type == AST_CONSTANT) {
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RTLIL::Const y = const_func(children[0]->bitsAsConst(width_hint, sign_hint),
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RTLIL::Const(children[1]->bits), sign_hint, false, width_hint);
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RTLIL::Const(children[1]->bits), sign_hint, type == AST_POW ? sign_hint : false, width_hint);
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newNode = mkconst_bits(y.bits, sign_hint);
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}
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break;
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@ -1042,7 +1043,6 @@ skip_dynamic_range_lvalue_expansion:;
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if (0) { case AST_MUL: const_func = RTLIL::const_mul; }
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if (0) { case AST_DIV: const_func = RTLIL::const_div; }
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if (0) { case AST_MOD: const_func = RTLIL::const_mod; }
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if (0) { case AST_POW: const_func = RTLIL::const_pow; }
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if (children[0]->type == AST_CONSTANT && children[1]->type == AST_CONSTANT) {
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RTLIL::Const y = const_func(children[0]->bitsAsConst(width_hint, sign_hint),
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children[1]->bitsAsConst(width_hint, sign_hint), sign_hint, sign_hint, width_hint);
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