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Revert some stuff

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This commit is contained in:
Akash Levy 2025-09-29 00:43:49 -07:00
parent 0b0c7bd19d
commit fbc2b71ed4
9 changed files with 8 additions and 42 deletions
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13
kernel/cost.cc
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@ -102,13 +102,6 @@ static bool is_free(RTLIL::IdString type)
type.in(ID($specrule), ID($specify2), ID($specify3)));
}
static bool is_mem(RTLIL::IdString type)
{
return (
// tags
type.in(ID($memrd), ID($memrd_v2), ID($memwr), ID($memwr_v2), ID($meminit), ID($meminit_v2), ID($mem), ID($mem_v2)));
}
unsigned int max_inp_width(RTLIL::Cell *cell)
{
unsigned int max = 0;
@ -213,13 +206,9 @@ unsigned int CellCosts::get(RTLIL::Cell *cell)
} else if (is_free(cell->type)) {
log_debug("%s is free\n", cell->name);
return 0;
} else if (is_mem(cell->type)) {
// SILIMATE: Memory cells have no bearing on cross module optimizations
log_debug("%s is mem\n", cell->name.c_str());
return 1;
}
// TODO: $fsm
// ignored: $pow
// ignored: $pow $memrd $memwr $meminit (and v2 counterparts)
log_warning("Can't determine cost of %s cell (%d parameters).\n", log_id(cell->type), GetSize(cell->parameters));
return 1;