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Allow module name to be determined by argument too

This commit is contained in:
Eddie Hung 2019-02-08 12:40:43 -08:00
parent f1befe1b44
commit fb8ad440a3
2 changed files with 44 additions and 14 deletions

View file

@ -28,7 +28,7 @@ struct AigerReader
{
RTLIL::Design *design;
std::istream &f;
std::string clk_name;
RTLIL::IdString clk_name;
RTLIL::Module *module;
unsigned M, I, L, O, A;
@ -39,7 +39,7 @@ struct AigerReader
std::vector<RTLIL::Wire*> latches;
std::vector<RTLIL::Wire*> outputs;
AigerReader(RTLIL::Design *design, std::istream &f, std::string clk_name="clk");
AigerReader(RTLIL::Design *design, std::istream &f, RTLIL::IdString module_name, RTLIL::IdString clk_name);
void parse_aiger();
void parse_aiger_ascii();
void parse_aiger_binary();