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https://github.com/YosysHQ/yosys
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New behavior for front-end handling of whiteboxes
Signed-off-by: Clifford Wolf <clifford@clifford.at>
This commit is contained in:
parent
f84a84e3f1
commit
fb7f02be55
6 changed files with 103 additions and 34 deletions
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@ -145,12 +145,18 @@ struct VerilogFrontend : public Frontend {
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log(" -nodpi\n");
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log(" disable DPI-C support\n");
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log("\n");
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log(" -noblackbox\n");
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log(" do not automatically add a (* blackbox *) attribute to an\n");
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log(" empty module.\n");
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log("\n");
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log(" -lib\n");
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log(" only create empty blackbox modules. This implies -DBLACKBOX.\n");
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log(" modules with the (* whitebox *) attribute will be preserved.\n");
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log(" (* lib_whitebox *) will be treated like (* whitebox *).\n");
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log("\n");
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log(" -wb\n");
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log(" like -lib, except do not touch modules with the whitebox\n");
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log(" attribute set. This also implies -DBLACKBOX.\n");
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log(" -nowb\n");
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log(" delete (* whitebox *) and (* lib_whitebox *) attributes from\n");
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log(" all modules.\n");
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log("\n");
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log(" -noopt\n");
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log(" don't perform basic optimizations (such as const folding) in the\n");
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@ -231,8 +237,9 @@ struct VerilogFrontend : public Frontend {
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formal_mode = false;
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norestrict_mode = false;
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assume_asserts_mode = false;
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noblackbox_mode = false;
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lib_mode = false;
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wb_mode = false;
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nowb_mode = false;
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default_nettype_wire = true;
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log_header(design, "Executing Verilog-2005 frontend.\n");
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@ -334,14 +341,17 @@ struct VerilogFrontend : public Frontend {
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flag_nodpi = true;
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continue;
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}
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if (arg == "-lib" && !wb_mode) {
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if (arg == "-noblackbox") {
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noblackbox_mode = true;
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continue;
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}
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if (arg == "-lib") {
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lib_mode = true;
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defines_map["BLACKBOX"] = string();
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continue;
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}
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if (arg == "-wb" && !lib_mode) {
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wb_mode = true;
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defines_map["BLACKBOX"] = string();
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if (arg == "-nowb") {
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nowb_mode = true;
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continue;
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}
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if (arg == "-noopt") {
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@ -439,7 +449,8 @@ struct VerilogFrontend : public Frontend {
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if (flag_nodpi)
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error_on_dpi_function(current_ast);
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AST::process(design, current_ast, flag_dump_ast1, flag_dump_ast2, flag_no_dump_ptr, flag_dump_vlog1, flag_dump_vlog2, flag_dump_rtlil, flag_nolatches, flag_nomeminit, flag_nomem2reg, flag_mem2reg, lib_mode, wb_mode, flag_noopt, flag_icells, flag_nooverwrite, flag_overwrite, flag_defer, default_nettype_wire);
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AST::process(design, current_ast, flag_dump_ast1, flag_dump_ast2, flag_no_dump_ptr, flag_dump_vlog1, flag_dump_vlog2, flag_dump_rtlil, flag_nolatches,
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flag_nomeminit, flag_nomem2reg, flag_mem2reg, noblackbox_mode, lib_mode, nowb_mode, flag_noopt, flag_icells, flag_nooverwrite, flag_overwrite, flag_defer, default_nettype_wire);
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if (!flag_nopp)
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delete lexin;
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