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proc_prune: Make assign removal and promotion per-bit, remember promoted bits.
Fixes #2962.
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parent
539d4ee907
commit
faacc7ad89
2 changed files with 47 additions and 40 deletions
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@ -67,51 +67,36 @@ struct PruneWorker
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}
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for (auto it = cs->actions.rbegin(); it != cs->actions.rend(); ) {
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RTLIL::SigSpec lhs = sigmap(it->first);
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bool redundant = true;
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for (auto &bit : lhs) {
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RTLIL::SigSpec rhs = sigmap(it->second);
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SigSpec new_lhs, new_rhs;
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SigSpec conn_lhs, conn_rhs;
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for (int i = 0; i < GetSize(lhs); i++) {
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SigBit bit = lhs[i];
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if (bit.wire && !assigned[bit]) {
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redundant = false;
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break;
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if (!affected[bit] && root) {
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conn_lhs.append(bit);
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conn_rhs.append(rhs[i]);
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} else {
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new_lhs.append(bit);
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new_rhs.append(rhs[i]);
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}
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assigned.insert(bit);
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affected.insert(bit);
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}
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}
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bool remove = false;
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if (redundant) {
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removed_count++;
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remove = true;
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} else {
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if (root) {
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bool promotable = true;
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for (auto &bit : lhs) {
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if (bit.wire && affected[bit] && !assigned[bit]) {
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promotable = false;
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break;
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}
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}
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if (promotable) {
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RTLIL::SigSpec rhs = sigmap(it->second);
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RTLIL::SigSig conn;
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for (int i = 0; i < GetSize(lhs); i++) {
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RTLIL::SigBit lhs_bit = lhs[i];
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if (lhs_bit.wire && !assigned[lhs_bit]) {
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conn.first.append(lhs_bit);
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conn.second.append(rhs.extract(i));
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}
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}
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promoted_count++;
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module->connect(conn);
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remove = true;
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}
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}
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for (auto &bit : lhs)
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if (bit.wire)
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assigned.insert(bit);
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for (auto &bit : lhs)
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if (bit.wire)
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affected.insert(bit);
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if (GetSize(conn_lhs)) {
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promoted_count++;
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module->connect(conn_lhs, conn_rhs);
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}
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if (remove)
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if (GetSize(new_lhs) == 0) {
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if (GetSize(conn_lhs) == 0)
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removed_count++;
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cs->actions.erase((it++).base() - 1);
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else it++;
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} else {
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it->first = new_lhs;
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it->second = new_rhs;
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it++;
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}
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}
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return assigned;
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}
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