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Merge remote-tracking branch 'origin/eddie/abc9_refactor' into eddie/abc9_required

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This commit is contained in:
Eddie Hung 2020-01-12 15:19:41 -08:00
commit f9aae90e7a
11 changed files with 198 additions and 156 deletions
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4
techlibs/ecp5/synth_ecp5.cc
View file

@ -323,9 +323,9 @@ struct SynthEcp5Pass : public ScriptPass
if (abc9) {
run("read_verilog -icells -lib +/ecp5/abc9_model.v");
if (nowidelut)
run("abc9 -lut +/ecp5/abc9_5g_nowide.lut -box +/ecp5/abc9_5g.box -W 200 -nomfs");
run("abc9 -lut +/ecp5/abc9_5g_nowide.lut -box +/ecp5/abc9_5g.box -W 200");
else
run("abc9 -lut +/ecp5/abc9_5g.lut -box +/ecp5/abc9_5g.box -W 200 -nomfs");
run("abc9 -lut +/ecp5/abc9_5g.lut -box +/ecp5/abc9_5g.box -W 200");
run("techmap -map +/ecp5/abc9_unmap.v");
} else {
if (nowidelut)

1
techlibs/xilinx/synth_xilinx.cc
View file

@ -556,7 +556,6 @@ struct SynthXilinxPass : public ScriptPass
run("read_verilog -icells -lib +/xilinx/abc9_model.v");
std::string abc9_opts = " -box +/xilinx/abc9_xc7.box";
abc9_opts += stringf(" -W %d", XC7_WIRE_DELAY);
abc9_opts += " -nomfs";
if (nowidelut)
abc9_opts += " -lut +/xilinx/abc9_xc7_nowide.lut";
else