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GoWin enablement: DRAM, initial BRAM, DRAM init, DRAM sim and synth_gowin flow

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Diego 2019-04-12 23:40:02 -05:00
parent db1a5ec6a2
commit f9272fc56d
10 changed files with 459 additions and 11 deletions
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29
techlibs/gowin/bram.txt Normal file
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bram $__GW1NR_SDP
# uncomment when done
# init 1
abits 10 @a10d18
dbits 16 @a10d18
abits 11 @a11d9
dbits 8 @a11d9
abits 12 @a12d4
dbits 4 @a12d4
abits 13 @a13d2
dbits 2 @a13d2
abits 14 @a14d1
dbits 1 @a14d1
groups 2
ports 1 1
wrmode 1 0
enable 1 1 @a10d18
enable 1 1 @a11d9 @a12d4 @a13d2 @a14d1
transp 0 0
clocks 2 3
clkpol 2 3
endbram
match $__GW1NR_SDP
min bits 2048
min efficiency 5
shuffle_enable B
make_transp
endmatch